Systems and methods for transmitting data according to an auto-negotiated data rate

Abstract

A transceiver of a first network device including an autonegotiation circuit and a first serializer interface. The auto-negotiation circuit is to negotiate a first data rate for transmission of data between the first network device and a second network device. The first serializer interface to receive the negotiated first data rate from the auto-negotiation circuit, receive first data from the second network device at the negotiated first data rate, replicate portions of the first data received from the second network device in accordance with the negotiated first data rate, and transmit, at a second data rate different from the first data rate, the first data including the replicated portions from the first serializer interface to a second serializer interface of the first network device.

Claims

1. A transceiver of a first network device, the transceiver comprising: an auto-negotiation circuit to negotiate a first data rate for transmission of data between the first network device and a second network device; and a first serializer interface to receive the negotiated first data rate from the auto-negotiation circuit, receive first data from the second network device at the negotiated first data rate, replicate portions of the first data received from the second network device in accordance with the negotiated first data rate, and transmit, at a second data rate different from the first data rate, the first data including the replicated portions from the first serializer interface to a second serializer interface of the first network device.

2. The transceiver of claim 1, wherein the first serializer interface is further to (i) determine whether the negotiated first data rate is less than a predetermined data rate and (ii) replicate the portions of the first data in response to a determination that the negotiated first data rate is less than the predetermined data rate.

3. The transceiver of claim 1, wherein replicating the portions of the first data includes padding the first data with dummy bits.

4. The transceiver of claim 1, wherein replicating the portions of the first data includes transmitting selected portions of the first data more than one time.

5. The transceiver of claim 1, further comprising a Gigabit Media Independent Interface to communicate with the second network device.

6. A network system, comprising: the transceiver of claim 1; and the second serializer interface, wherein the second serializer interface is further to (i) receive the first data from the first serializer interface at the second data rate, (ii) determine whether the first data received from the first serializer interface includes the replicated portions, and (ii) ignore the replicated portions of the first data.

7. The network system of claim 6, wherein the transceiver corresponds to a physical layer device, and further comprising a media access controller that includes the second serializer interface.

8. The network system of claim 6, further comprising: a first pair of differential wires to communicate data from the first serializer interface to the second serializer interface; and a second pair of differential wires to communicate data from the second serializer interface to the first serializer interface.

Description

BRIEF DESCRIPTION OF DRAWINGS

(1) In the drawings wherein like reference symbols refer to like parts:

(2) FIG. 1 is a schematic diagram of a conventional networking system;

(3) FIG. 2 is a schematic diagram of a networking system in accordance with a first embodiment of the present invention;

(4) FIG. 3 is a more detailed schematic diagram of a media access controller (MAC) and PHY in accordance with the first embodiment of the present invention;

(5) FIG. 4 is a more detailed schematic diagram of a media access controller (MAC) and PHY in accordance with a second embodiment of the present invention; and

(6) FIG. 5 is a more detailed schematic diagram illustrating auto-negotiation in accordance with the first embodiment of the present invention.

DESCRIPTION

(7) Referring to FIG. 2, shown therein is a preferred embodiment of the present invention. As shown therein, a computer 10 is connected to a first port of switch 20 via a communications channel, such as, twisted pair cable 30. Switch 20 may comprise 24 ports, to allow computer 10 to communicate with other computers, peripherals, network appliances and other networks.

(8) Computer 10 comprises a media access controller or (MAC) 12 and physical layer interface (PHY) or transceiver 16, which are connected to each other in accordance with an interface, such as, MII or GMII discussed above. Media access controller 12, computer 10, and PHY 16 are similar to those described above, therefore no further discussion is provided herein. As will be appreciated by one of ordinary skill in the art, communication channel 30 may be implemented using a variety of techniques, for example wired, wireless, radio frequency, optical and the like.

(9) Switch 20 comprises n ports. Each of the n ports comprises MAC 22.sub.n and PHY 26.sub.n. PHY 26.sub.n comprises serializer interface 27.sub.n, and MAC 22.sub.n comprises serializer interface 28.sub.n, which are connected to each other to facilitate communication between MAC 22.sub.n and PHY 26.sub.n. Serializer interfaces 28.sub.1-28.sub.n and MAC's 22.sub.1-22.sub.n are fabricated on a single integrated circuit. PHY 26.sub.n and serializer interface 27.sub.n are fabricated on another integrated circuit. Serializer interfaces 27.sub.n and 28.sub.n have high bandwidth that can connected to each other using only a small number of wires, connections or pins for each transmit and receive link. In the preferred embodiment, serializer interfaces 27.sub.n and 28.sub.n are implemented in accordance with the fiber channel physical layer device standard as described in IEEE 802.3, section 36, commonly known as 1000 BASE-X. The contents of IEEE 802.3, section 36 are incorporated herein by reference.

(10) Referring now to FIG. 3, serializer interface 28.sub.n comprises receive port 41.sub.n, transmit port 42.sub.n and interface 43.sub.n. Port 41.sub.n of serializer interface 28.sub.n is connected to the transmit port 46.sub.n of serializer interface 27.sub.n by a pair of differential wires, and transmit port 42.sub.n of serializer interface 28.sub.n is connected to receive port 47.sub.n of serializer interface 27.sub.n by a pair of differential wires. Port 43.sub.n is connected to MAC 22.sub.n, and port 48.sub.n is connected to PHY 26.sub.n.

(11) In the preferred embodiment serializer interface 28.sub.n requires only 4 pins, 2 pairs of differential wires or interconnections are required for each port. For a 24 port switch only 96 pins are required instead of the 576 pins required using conventional techniques.

(12) FIG. 4 is a schematic diagram of another embodiment of the present invention. The embodiment shown herein is similar to the embodiment shown in FIG. 2, however PHY 26.sub.n comprises a GMII standard interface 23.sub.n. In this configuration, PHY 26.sub.n can be connected to any GMII compliant device, which can facilitate communication between that device and either serializer interface 27.sub.n or twisted pair cable 30.

(13) The auto-negotiation feature will now be described below with reference to FIG. 5.

(14) In accordance with any of the embodiments above, while switch 20 has the capability of communicating at nominally 1 gigabit per second, switch 20 must also be able to communicate at data rates of 10 Mbits per second and 100 Mbits per second, dependent on the network client connected thereto.

(15) FIG. 5 is a schematic diagram of an embodiment capable communicating with a network client having a different data transmission rate. This embodiment generally comprises the same components as that of FIG. 2. More specifically, serializer interface 27.sub.n comprises transmitter/encoder 60.sub.n and receiver/decoder 61.sub.n and serializer interface 28.sub.n comprises transmitter/encoder 63.sub.n and receiver/decoder 62.sub.n. Very generally, the principal of operation is as follows. Firstly, the data transmission rate between serializer interface 27.sub.n and serializer interface 28.sub.n is maintained at 1.25 gigabit per second, regardless of the data transmission rate between the network client and PHY 26.sub.n. In operation, auto-negotiation circuit 70.sub.n negotiates the data transmission rate with the network client using known techniques such as, standard IEEE 802.3, sections 28 and 40, the contents of which are incorporated by reference. The negotiated transmission rate is communicated to transmitter/encoder 60.sub.n via control signal 110. If the data transmission rate is below the nominal 1 gigabit per second, transmitter/encoder 60.sub.n will replicate data transmitted to serializer interface 28.sub.n, as explained in detail below, while the data transmission rate between from transmitter/encoder 60.sub.n to serializer interface 28.sub.n is maintained at 1.25 gigabit per second. In the serializer interface 28.sub.n, receiver/decoder 62.sub.n monitors the data transmission and determines if data has been replicated. If no data has been replicated, the data transmission rate is 1.25 gigabit per second and no special processing is performed and all data is communicated with MAC 22.sub.n. If receiver/decoder 62.sub.n determines that data is being replicated, then the replicated data is ignored and not communicated to MAC 22.sub.n. This feature allows switch 20 to communicate with network clients having a lower transmission rate without the need for costly and complicated circuits.

(16) In a data communication system in accordance with 1000 BASE-X as described in IEEE 802.3, section 36, when there is no data to be transmitted, the transmitting component, for example PHY.sub.n, sends an idle ordered set of data which consists of two alternating 10 bit code groups which are denoted as /K28.5/D16.2/. This ordered set is abbreviated as /I/. It is noted that the ordered set /K28.5/D5.6/ is occasionally utilized to maintain correct disparity. Also in accordance with 1000 BASE-X, when a packet is transmitted, the packet is delimited by a start of packet and end of packet delimiters which are abbreviated /S/ and /T/R/, respectively.

(17) Receiver/decoder 62.sub.n and receiver/decoder 61.sub.n perform alignment of the bits stream into code-groups by searching for a comma pattern, namely, is 1100000 or 0011111. The comma pattern cannot be found in any code-group or within a concatenation of any combination of code-groups except for the code-groups /K28.5/, /K28.1/, and /K28.7/. In the preferred embodiment the code groups /K28.1/ and /K28.7/ are not used. Hence alignment is performed during idles where the /K28.5/ code-group is present.

(18) It is further noted that the /K28.5/ code-group is also used in other ordered sets to pass configuration information. For example /K28.5/D21.5/Dx.x/Dx.x/ is a valid configuration ordered set. In the preferred embodiment, receiver/decoder 62.sub.n and 61.sub.n ignore most of the ordered sets containing configuration information. This simplifies the design of receiver/decoders 62.sub.n and 61.sub.n.

(19) As noted above, the ordered set /K28.5/D5.6/ is occasionally utilized to maintain correct disparity. In general, the purpose of disparity is twofold. First, disparity is used to ensure that there will be equal numbers of 0's and 1's are transmitted over a short period of time to maintain DC balance regardless of the actual data within the packet. Second, disparity allows the receiver to detect the presence of errors that occurs over the transmission medium. Typically, for each code group there is two possible 10 bit sequences. One is transmitted when the disparity is positive, and the other when negative. (For some code-groups the same 10-bit sequence is used to for both positive and negative disparities.)

(20) In the following discussion it is assumed that the signal flow is serializer interface 27.sub.n to serializer interface 28.sub.n. The reverse process is used from the serializer interface 28.sub.n to serializer interface 27.sub.n.

(21) More specifically, in transmitter/encoder 60.sub.n nibbles are replicated. Since the conversion into 1000BASE-X requires byte wide data while 10BASE-T/100BASE-TX passes data in nibble wide data, the upper four bits of the byte are padded with dummy bits by transmitter/encoder 60.sub.n. In 100BASE-TX the data is replicated 5 times and five bytes are transmitted from the 1000BASE-X for each 100BASE-TX nibble. In 10BASE-T the data is replicated 50 times.

(22) In accordance with an alternative implementation of transmitter/encoder 60.sub.n, the upper bits are not padded but rather two nibbles are passed at a time. In this case the data is replicated 10 and 100 for 100 BASE-TX and 10 BASE-T times respectively. The advantage of this approach is that MAC 22.sub.n passes data in bytes regardless of the speed of operation.

(23) Note that the /S/ code group must be transmitted 10 or 100 times for 100 BASE-TX and 10 BASE-T, respectively. In principle the /T/R/ and /I/ code-groups must be transmitted 10 or 100 times for 100 BASE-TX and 10 BASE-T, respectively. However in accordance with the present embodiment, latency can be shortened by transmitting the code groups 5 or 50 times, for 100 BASE-TX and 10 BASE-T, respectively.

(24) In the present embodiment data is simply replicated as many times as needed and disparity is calculated once every 5 or 50 code groups for 100 BASE-TX and 10 BASE-T, respectively. In an alternate embodiment, disparity can also be calculated once every code group. This will allow a better short-term DC balance, but may complicate serializer interface 28.sub.n.

(25) PHY 26.sub.n determines the data transmission rate of the network based on auto-negotiation. However the MAC 22.sub.n requires some time to receive the data from the PHY 26.sub.n before it can respond. More specifically, auto-negotiation circuit 70.sub.n negotiates the transmission data rate with the network client and sends a control signal 110 to transmitter/encoder 60.sub.n. As noted above, transmitter/encoder 60.sub.n will either pass the data through or replicate bits in accordance with the detected data transmission rate. Receiver/decoder 62.sub.n of serializer interface 28.sub.n can sense the data transmission rate by counting the number of /K28.5/ it receives, as noted above. Receiver/decoder 62.sub.n sends a control signal 212 to transmitter/encoder 63.sub.n. Receiver/decoder 61.sub.n of serializer interface 27.sub.n can sense the data transmission rate as noted above. Receiver/decoder 61.sub.n then compares the data transmission rate it senses to the auto-negotiated data transmission rate from control signal 110. If the data transmission rates are different, then receiver/decoder 61.sub.n sends control signal 112 to transceiver 80 to transmit idle bits. When the data transmission rates become the same, the control 112 then permits transceiver 80 to transmit data.

(26) While the invention has been described in conjunction with several specific embodiments, it is evident to those skilled in the art that many further alternatives, modifications and variations will be apparent in light of the foregoing description. Moreover, it is contemplated that the present invention is not limited to the nominal 1 gigabit per second data transmission rate and above-described protocols, and may be implemented with other appropriate data transmission rates and protocols. Thus, the invention described herein is intended to embrace all such alternatives, modifications, applications and variations as may fall within the spirit and scope of the appended claims.