DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
20170062393 · 2017-03-02
Inventors
Cpc classification
H01L2224/81401
ELECTRICITY
H01L2224/80401
ELECTRICITY
H01L2224/81438
ELECTRICITY
H01L24/80
ELECTRICITY
H01L2224/81401
ELECTRICITY
H01L2224/80438
ELECTRICITY
H01L2224/81438
ELECTRICITY
H01L21/78
ELECTRICITY
H01L2224/80417
ELECTRICITY
H01L2224/951
ELECTRICITY
H01L2224/80203
ELECTRICITY
H01L24/95
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/80401
ELECTRICITY
H01L2224/80438
ELECTRICITY
H01L2224/95144
ELECTRICITY
H01L2221/68368
ELECTRICITY
H01L2224/80
ELECTRICITY
H01L2224/03002
ELECTRICITY
H01L2224/81417
ELECTRICITY
H01L2224/81001
ELECTRICITY
H01L2224/81417
ELECTRICITY
H01L2224/80417
ELECTRICITY
H01L2224/80003
ELECTRICITY
H01L2224/81001
ELECTRICITY
H01L2224/81203
ELECTRICITY
H01L2224/951
ELECTRICITY
H01L2224/04
ELECTRICITY
H01L21/78
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2224/81203
ELECTRICITY
H01L24/97
ELECTRICITY
H01L2224/04
ELECTRICITY
H01L2224/95
ELECTRICITY
H01L2224/80
ELECTRICITY
H01L2224/95144
ELECTRICITY
H01L2221/6834
ELECTRICITY
H01L2221/68368
ELECTRICITY
H01L2221/68381
ELECTRICITY
H01L2224/97
ELECTRICITY
H01L2224/95001
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2224/95
ELECTRICITY
H01L2224/97
ELECTRICITY
H01L2224/80203
ELECTRICITY
H01L2224/95136
ELECTRICITY
H01L2221/68381
ELECTRICITY
International classification
H01L25/075
ELECTRICITY
H01L33/00
ELECTRICITY
H01L33/06
ELECTRICITY
H01L33/62
ELECTRICITY
Abstract
A method of manufacturing a display device includes: immersing a mask including openings, in a solution; seating light-emitting diode chips respectively in the openings of the mask; arranging a first flexible substrate including first wirings thereon, below the mask, and aligning the first wirings to respectively correspond to the openings of the mask; removing from the solution, the first flexible substrate with the first wirings corresponding to the openings of the mask together with the mask with the light-emitting diode chips seated in the openings thereof; bonding the light-emitting diode chips and the first wirings to each other; providing a second flexible substrate including second wirings thereon, and aligning the second wirings to respectively correspond to the light-emitting diode chips; and bonding the light-emitting diode chips and the second wirings to each other, to form the display device.
Claims
1. A method of manufacturing a display device, the method comprising: immersing a mask comprising an opening defined therein in plural, in a solution; seating a light-emitting diode chip provided in plural respectively in the openings of the mask in the solution; in the solution, arranging a first flexible substrate comprising a first wiring in plural thereon, below the mask, and aligning the first wirings on the first flexible substrate to respectively correspond to the openings of the mask; removing from the solution, the first flexible substrate with the first wirings corresponding to the openings of the mask together with the mask with the light-emitting diode chips seated in the openings thereof; bonding the light-emitting diode chips and the first wirings to each other; providing a second flexible substrate comprising a second wiring in plural thereon, and aligning the second wirings on the second flexible substrate to respectively correspond to the light-emitting diode chips; and bonding the light-emitting diode chips and the second wirings to each other, to form the display device.
2. The method of claim 1, wherein the seating the light-emitting diode chip comprises: seating a single one light-emitting diode chip in each of the openings of the mask.
3. The method of claim 1, wherein the second wirings lengthwise extend in a direction crossing a direction in which the first wirings lengthwise extend.
4. The method of claim 1, wherein the openings respectively correspond to locations where the first wirings cross the second wirings.
5. The method of claim 1, further comprising: removing the mask from the light-emitting diode chips seated in the openings thereof, before the bonding the light-emitting diode chips and the first wirings to each other.
6. The method of claim 1, further comprising for each light-emitting diode chip seated in the mask: disposing a first electrode pad on a first end of the light-emitting diode chip before the seating the light-emitting diode chip.
7. The method of claim 6, wherein the first electrode pad comprises a material having a density greater than that of the light-emitting diode chip.
8. The method of claim 6, wherein the bonding the light-emitting diode chips and the first wirings to each other comprises bonding the first electrode pad to the first wiring by using pressurization and/or Joule heat.
9. The method of claim 1, wherein the solution comprises fluorine.
10. The method of claim 1, wherein the mask comprises a magnetic material, and the light-emitting diode chip is coated with the magnetic material.
11. The method of claim 1, wherein the light-emitting diode chips each comprise a semiconductor compound, further comprising: disposing the light-emitting diode chips comprising the semiconductor compound on a base substrate, processing the light-emitting diode chips disposed on the base substrate to be separable from the base substrate, transferring the separable light-emitting diode chips to a carrier substrate, and removing the base substrate from the separable light-emitting diode chips to dispose the light-emitting diode chips on the carrier substrate.
12. The method of claim 1, wherein a minimum size of the opening of the mask is greater than a maximum size of the light-emitting diode chip.
13. The method of claim 1, wherein the seating the light-emitting diode chip in the opening of the mask in the solution comprises moving the light-emitting diode chip up and down within the solution by using a laser.
14. The method of claim 1, wherein the seating the light-emitting diode chip in the opening of the mask in the solution comprises moving the light-emitting diode chip up and down within the solution by using an ultrasonic wave.
15. The method of claim 1, wherein both a width of the first wiring taken perpendicular to a length thereof and a width of the second wiring taken perpendicular to a length thereof, are less than a width of the light-emitting diode chip taken perpendicular to a length thereof.
16. A display device manufactured by the method of claim 1.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0028] These and/or other features will become apparent and more readily appreciated from the following description of the exemplary embodiments, taken in conjunction with the accompanying drawings in which:
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DETAILED DESCRIPTION
[0043] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings, where like reference numerals refer to like elements throughout. In this regard, the exemplary embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein. Accordingly, the exemplary embodiments are merely described below, by referring to the figures, to explain features of the invention.
[0044] It will be understood that when an element is referred to as being on another element, it can be directly on the other element or intervening elements may be present therebetween. In contrast, when an element is referred to as being directly on another element, there are no intervening elements present.
[0045] It will be understood that, although the terms first, second, third etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings herein.
[0046] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms a, an, and the are intended to include the plural forms. Expressions such as at least one of when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list. As used herein, the term and/or includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms comprises and/or comprising, or includes and/or including when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.
[0047] Furthermore, relative terms, such as lower or bottom and upper or top, may be used herein to describe one element's relationship to another element as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. For example, if the device in one of the figures is turned over, elements described as being on the lower side of other elements would then be oriented on upper sides of the other elements. The exemplary term lower, can therefore, encompasses both an orientation of lower and upper, depending on the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as below or beneath other elements would then be oriented above the other elements. The exemplary terms below or beneath can, therefore, encompass both an orientation of above and below.
[0048] About or approximately as used herein is inclusive of the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, considering the measurement in question and the error associated with measurement of the particular quantity (i.e., the limitations of the measurement system). For example, about can mean within one or more standard deviations, or within 30%, 20%, 10% or 5% of the stated value.
[0049] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
[0050] Exemplary embodiments are described herein with reference to cross section illustrations that are schematic illustrations of idealized embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments described herein should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region illustrated or described as flat may, typically, have rough and/or nonlinear features. Moreover, sharp angles that are illustrated may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the present claims.
[0051]
[0052] Referring to
[0053] The manufacturing method of
[0054]
[0055] The base substrate 101 may include a conductive substrate or an insulating substrate. In an exemplary embodiment, for example, the base substrate 101 may include at least one of Al.sub.2O.sub.3, SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga.sub.2O.sub.3.
[0056] The LED 105 may include a first semiconductor layer 102, a second semiconductor layer 104, and an active layer 103 disposed between the first semiconductor layer 102 and the second semiconductor layer 104. The first semiconductor layer 102, the active layer 103 and the second semiconductor layer 104 may be formed by using methods such as metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE) and hydride vapor phase epitaxy (HVPE).
[0057] The first semiconductor layer 102 may be implemented as, for example, a p-type semiconductor layer. The p-type semiconductor layer may include a semiconductor material having a composition equation of In.sub.xAl.sub.yGa.sub.1-x-yN (0x1, 0y1, 0x+y1), and may include, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, etc. The first semiconductor layer 102 may be doped with p-type dopants such as Mg, Zn, Ca, Sr and Ba.
[0058] The second semiconductor layer 104 may include, for example, an n-type semiconductor layer. An n-type semiconductor layer may include a semiconductor material having a composition equation of In.sub.xAl.sub.yGa.sub.1-x-yN (0x1, 0y1, 0x+y1), and may include, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, etc. The second semiconductor layer 104 may be doped with n-type dopants such as Si, Ge and Sn.
[0059] However, the invention is not limited thereto. In an alternative exemplary embodiment, the first semiconductor layer 102 may include the n-type semiconductor layer and the second semiconductor layer 104 may include the p-type semiconductor layer.
[0060] The active layer 103 is a region in which an electron and a hole recombine. When the electron and the hole recombine, they may make a transition to a lower energy level and emit light having a corresponding wavelength. The active layer 103 may include a semiconductor material having a composition equation of In.sub.xAl.sub.yGa.sub.1-x-yN (0x1, 0y1, 0x+y1), and may include a single quantum well structure or a multi-quantum well (MQW) structure. Also, the active layer 103 may include a quantum wire structure or a quantum dot structure.
[0061] The plurality of LEDs 105 disposed on the base substrate 101 is processed such that the plurality of LEDs 105 are separable from the base substrate 101. In an exemplary embodiment, a cut or score is disposed along cutting lines CL1 and CL2 by using a laser, etc., such that the plurality of LEDs 105 are allowed to be in a separable state from the base substrate 101.
[0062]
[0063] With the plurality of LEDs 105 in a separable state from the base substrate 101, but while still disposed on the base substrate 101, the carrier substrate 201 is attached on the second semiconductor layers 104 of the LEDs 105. The position of the LEDs 105 is temporarily fixed on the carrier substrate 201 such as by using an adhesive layer (not shown), etc.
[0064]
[0065] The base substrate 101 is separated from the LEDs 105 such as by using a laser lift-off process, and the separated LEDs 105 are attached to the carrier substrate 201. For the LEDs 105 attached to the carrier substrate 201, the first electrode pad 106 is disposed on a distal end of the LEDs 105 at the first semiconductor layers 102 thereof from which the base substrate 101 has been removed. The LED 105 with the first electrode pad 106 thereon forms a LED chip 100. The electrode pad 106 of the LED chip 100 may define a relatively high density portion of the LED chip 100, such as due to a material from which the first electrode pad 106 is formed.
[0066] The first electrode pad 106 may include one or more layers, and may include various conductive materials such as metal, a conductive oxide and conductive polymers. The first electrode pad 106 will be electrically connected to a first wiring 501 (see
[0067]
[0068] Though
[0069]
[0070] Referring to
[0071] Since the mask 400 includes and defines the plurality of openings 401 therein, even when the mask 400 is immersed in a container 300 containing a solution 301, the mask 400 does not sink to the bottom of the container 300 but instead floats in the neighborhood of the uppermost surface of the solution 301. To support the mask 400 floating at the uppermost surface of the solution 301, a material such as fluorine that reduces surface tension may be further added to the solution 301.
[0072] The carrier substrate 201 is separated from the second semiconductor layers 104 of the LEDs 105 to separate the plurality of LED chips 100 from the carrier substrate 201. The separated plurality of LED chips 100 including the LEDs 105 having the first electrode pads 106 respectively thereon are dropped toward the container 300 from a position above the mask 400 in the container 300.
[0073]
[0074] The separated LED chip 100 dropped from a position above the mask 400 settles in an opening 401 defined in the mask 400. For settling the dropped LED chips 100 into the openings 401 of the mask 400, the LED chips 100 may be uniformly disposed or spread over the entire mask 400 such as by using a brush (not shown), etc.
[0075] The LED chip 100 is positioned at the upper surface of the solution 301 so that a portion of the LED chip 100 at which the first electrode pad 106 having the relatively high density may face downward. In an exemplary embodiment, for example, since the density of silicon forming a semiconductor LED is about 2.33 grams per cubic centimeter (g/cm.sup.3), where the first electrode pad 106 includes aluminum having a density of about 2.70 g/cm.sup.3 or silver having density of about 10.49 g/cm.sup.3, an LED chip 100 may be disposed in each opening 401 with the portion including the first electrode pad 106 reversed in position to be disposed in a downward direction. If unreversed LED chips 100 remain disposed over the mask 400, positions thereof may be reversed such as by using an ultrasonic wave or a laser. A degree to which the positions of the unreversed LED chips 100 are reversed may be determined such as by measuring reflectivity.
[0076] A size of the opening 401 is larger than that of the LED chip 100 so that the LED chip 100 may rotate up and down while disposed within the opening 401 of the mask 400 in the solution 301. In an exemplary embodiment, for example, a minimum dimension of the opening 401 in the top plan view may be larger than a maximum of every dimension of the LED chip 100, to allow the LED chip 100 to rotate while disposed within the opening 401. Only one LED chip 100 may be disposed in a single opening of the mask 401.
[0077]
[0078]
[0079]
[0080] The plurality of first wirings 501 are disposed to respectively correspond to the positions of the plurality of openings 401 defined in the mask 400. Since the LED chip 100 is located in each opening 401 of the mask, the first wiring 501 is aligned to pass below the lower portion of the LED chip 100. A single first wiring 501 may pass below a lower portion of more than one LED chip 100 and the opening 401 in which the LED chip 100 is seated.
[0081] The first flexible substrate 502 may include a plastic material. In an exemplary embodiment, for example, the first flexible substrate 502 may include polyether sulphone (PES), polyacrylate (PAR), polyether imide (PEI), polyethylene naphthalate (PEN), polyethylene terepthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide, polycarbonate (PC), cellulose triacetate (TAC), and cellulose acetate propionate (CAP).
[0082] The first wiring 501 may include a relatively low resistance metallic material. In an exemplary embodiment, for example, the first wiring 501 may include a single layer structure or a multi layer structure including at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W and Cu.
[0083] The first wiring 501 is lengthwise extended to define an extension direction thereof, and a width of the first wiring 501 is defined perpendicular to the extension direction thereof. Similarly, the LED chip 100 is lengthwise extended to define an extension direction thereof, and a width of the LED chip 100 is defined perpendicular to the extension direction thereof. The width of the LED chip 100 may be a diameter of the LED chip 100 when the LED chip 100 has a cylindrical shape. The width of the first wiring 501 is smaller than that of the LED chip 100.
[0084]
[0085] Referring to
[0086]
[0087] Referring to
[0088]
[0089] Referring to
[0090] Like the first flexible substrate 502, the second flexible substrate 702 may include a plastic material. In an exemplary embodiment, for example, the second flexible substrate 702 may include polyether sulphone (PES), polyacrylate (PAR), polyether imide (PEI), polyethylene naphthalate (PEN), polyethylene terepthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide, polycarbonate (PC), cellulose triacetate (TAC) and cellulose acetate propionate (CAP).
[0091] The second wiring 701 may include a relatively low resistance metallic material. In an exemplary embodiment, for example, the second wiring 701 may include a single layer structure or a multi layer structure including at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W and Cu.
[0092] Similar to the first wiring 501, the second wiring 701 is lengthwise extended to define an extension direction thereof, and a width of the second wiring 701 is defined perpendicular to the extension direction thereof. The width of the second wiring 701 is smaller than that of the LED chip 100.
[0093] The second wiring 701 may be electrically connected with an upper surface of the LED chip 100, that is, at the second semiconductor layer 104 (see
[0094] Referring to
[0095] According to one or more exemplary embodiment of the above-described manufacturing method, a display device including the LED chip 100 is driven in a passive matrix (PM) method in which a plurality of LED chips 100 share scan lines and data lines, as compared to an active matrix (AM) method in which at least one thin film transistor is connected to each LED chip 100. Therefore, power consumption of the display device may be reduced.
[0096] Referring to
[0097] Also, since an individual LED chip 100 is connected to a first wiring 501 extended in the first direction X and a second wiring 701 extended in the second direction Y, the first and second wirings 501 and 701 remain doubly connected to the LED chip 100 in up and down directions and in a diagonal line (e.g., X and Y directions and those direction inclined therebetween), a contact failure between the wirings and the chip may reduce and thus reliability of the display device may improve.
[0098] Also, since the mask including an opening corresponding to a wiring having the PM structure is used, transferring and aligning of an LED with the wiring may be performed relatively simply.
[0099] Though the invention has been described with reference to exemplary embodiments illustrated in the drawings, these are provided for an exemplary purpose only, and those of ordinary skill in the art will understand that various modifications and other equivalent embodiments may be made therein. Therefore, the spirit and scope of the invention should be defined by the following claims.