Chip stack structure using conductive film bridge adhesive technology

Abstract

A chip stack structure using conductive film bridge adhesive technology comprises a substrate, a first chip, at least one bridge element, a conductive film, and a second chip. The first chip is electrically connected to a first electrode of the substrate. The at least one bridge element has a first bridge surface and a second bridge surface at two ends, and the first bridge surface and the second bridge surface are electrically connected to the first chip and a second electrode of the substrate, respectively. The conductive film is electrically connected to the first bridge surface of the at least one bridge element. The second chip is stacked and electrically connected to the conductive film. Thus, the structure of the present invention not only facilitates the ease of stacking the chips but also increases the effectiveness of the chips heat dissipation and ability of withstanding electrical current.

Claims

1. A chip stack structure using conductive film bridge adhesive technology, comprising: a substrate comprising a first electrode and a second electrode; a first chip, arranged on the substrate and directly connected to the first electrode of the substrate; at least one bridge element having a first bridge surface and a second bridge surface at two ends, the first bridge surface and the second bridge surface being directly connected to the first chip and the second electrode of the substrate, respectively; a conductive film, stacked and directly connected to a top surface of the first bridge surface of the at least one bridge element; and a second chip, stacked and directly connected to a top surface of the conductive film, wherein a bottom surface of the first chip has a first connecting surface and a top surface of the first chip has a second connecting surface, the first connecting surface is disposed on the first electrode of the substrate, and the first bridge surface of the at least one bridge element is connected to the second connecting surface; and wherein the substrate further comprises a third electrode, the second bridge surface of the at least one bridge element is directly connected to the third electrode.

2. The chip stack structure using conductive film bridge adhesive technology in claim 1, wherein the conductive film is a tin film.

3. The chip stack structure using conductive film bridge adhesive technology in claim 1, wherein the first bridge surface and the second bridge surface of the at least one bridge element are flat surfaces.

4. The chip stack structure using conductive film bridge adhesive technology in claim 1, wherein the at least one bridge element is a copper film.

Description

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

(1) FIG. 1 is a top view of a conventional chip package structure, and it mainly shows that aluminum wires electrically connect the chips and the substrate by wire bonding in the conventional manner.

(2) FIG. 2 is a cross-sectional view of a conventional chip stack structure, which mainly shows the arrangement relationship between the first chip and the second chip.

(3) FIG. 3 is a circuit diagram of a half bridge module.

(4) FIG. 4 is a cross-sectional view of a chip stack structure using conductive film bridge adhesive technology of a preferred embodiment of the present invention, and it mainly shows the aspect that a plurality of chip stack structures.

(5) FIG. 5 is a top view of a chip stack structure using conductive film bridge adhesive technology of a preferred embodiment of the present invention, and it mainly shows the change area after the plurality of chip are stacked.

DETAILED DESCRIPTION OF THE INVENTION

(6) In order to describe the structure, technical features, and effects of the present invention in detail, a preferred embodiment corresponding to following drawings is illustrated as follows.

(7) Please refer to FIG. 3 to FIG. 5, which show a chip stack structure 10 using conductive film bridge adhesive technology of a preferred embodiment of the present invention. The chip stack structure 10 comprises:

(8) A substrate 20, which comprises a first electrode 21 and a second electrode 23.

(9) A first chip 30, which is electrically connected to the first electrode 21 of the substrate 20.

(10) At least one bridge element 40, which is a copper film and has a first bridge surface 41 and a second bridge surface 43 at two ends of the at least one bridge element 40. The first bridge surface 41 and the second bridge surface 43 are electrically connected to the first chip 30 and the second electrode 23 of the substrate 20, respectively. In the preferred embodiment of the present invention, the first bridge surface 41 and the second bridge surface 43 of the at least one bridge element 40 are flat surfaces. Since the bridge element 40 has a comparatively large conductive area, it replaces the conventional aluminum wire to improve the effect of withstanding electrical current.

(11) A conductive film 50, which is a tin film and is electrically connected to the first bridge surface 41 of the at least one bridge element 40. Thereby, the conductive film 50 can be comparatively stably disposed on the first bridge surface 41 of the at least one bridge element 40.

(12) A second chip 60, which is stacked and electrically connected to the conductive film 50. Since the conductive film 50 is a sheet-like structure, the second chip 60 can be placed plainly. Furthermore, because the second chip 60 conducts the first chip 30 and the at least one bridge element 40 through the tin conductive film 50, heat generated by the first and second chips 30, 60 can be quickly and efficiently dissipated to prevent overall performance degradation due to being unable to dissipate the heat in a timely manner.

(13) It should be noted that the conductive film 50 of the chip stack structure of the present invention is a tin film. Therefore, there won't be any voids generated in the conductive film 50 during the melting process when the vacuum reflow furnace is welding. This way helps the adhesion and prevents the second chip 60 from peeling.

(14) In addition, the numbers of chip stack layers of the chip stack structure 10 using the conductive film bridge adhesive technology and the bridge element 40 are not limited to the numbers of the abovementioned. The capacity of the structure can be improved by interlacing and stacking a plurality of the bridge elements 40, a plurality of the conductive films 50, and a plurality of the second chip 60 on the first chip 30. Or, as shown FIGS. 4 and 5, the substrate 20 further has a third electrode 25. The second surface 43 of the at least one second bridge element 40 is electrically connected to the third electrode 25. The first chip 30 has a first surface 31 and a second connecting surface 33. The first connecting surface 31 is disposed on the first electrode 21 of the substrate 20. The first bridge surface 41 of the at least one bridge element 40 is connected to the second connecting surface 33. The second chip 60 has a first connecting surface 61 and a second connecting surface 63. The first connecting surface 61 of the second chip 60 is connected to the conductive film 50. The second connecting surface 63 of the second chip 60 can be continuously stacked with the bridge element 40 and the conductive film 50 as the aforesaid structure in order for provide various chip stack structures to achieve different circuit layouts.

(15) In conclusion, the chip stack structure using conductive film bridge adhesive technology of the present invention utilizes the first bridge surface and the second bridge surface, which are both flat and have a large conductive area, of the bridge element, to improve the effectiveness of withstanding electrical current and to provide the conduction film to be disposed plainly. Thereby, the heat generated by each of the chips will be quickly and effectively dissipated to prevent overall performance degradation due to being unable to dissipate the heat in a timely manner. Moreover, because the conductive film is a tin film, there won't be any void generated in the conductive film during the melting process when the vacuum reflow furnace is welding. This way supports the adhesive bond and prevents the second chip from peeling.

(16) The components disclosed in the abovementioned embodiment of the present invention are only illustrative and not intended to limit the scope of the present invention. Substitutions or changes of other equivalent elements should be covered by the claims of the present invention.