CONTROL OF SILICON NITRIDE TOPOLOGY AT TRENCH BOTTOM

Abstract

A method of modifying a dielectric film on a substrate includes depositing a protective polymer coating onto a dielectric film that covers top surfaces of fins and sidewalls and bottom of trenches in a substrate and forms a filled region at the bottom of the trenches, and plasma etching the substrate at processing conditions selected so as to remove the protective polymer coating and a portion dielectric film at the bottom of the trenches so as to increase the concavity of the top surface of the filled region.

Claims

1. A method of modifying a dielectric film on a substrate, the method comprising: on a substrate that includes a wafer, a hardmask mask layer on the wafer, and a plurality of trenches that extend through the hardmask mask layer and into the wafer to form a plurality of fins, and a dielectric film that coats top surfaces of the fins and sidewalls and bottom of the trenches and forms a filled region at the bottom of the trenches, depositing a protective polymer coating onto the dielectric film such that the protective polymer coating covers the top surfaces of the fins and the sidewalls and bottom of the trenches; and plasma etching the substrate at processing conditions selected so as to remove the protective polymer coating and a portion dielectric film at the bottom of the trenches so as to increase the concavity of the top surface of the filled region.

2. The method of claim 1, wherein the dielectric film is a silicon nitride film.

3. The method of claim 2, wherein the hardmask mask layer is silicon nitride.

4. The method of claim 3, wherein performing the reactive ion etch removes a portion of the hardmask mask layer from the top of the fins.

5. The method of claim 1, wherein the protective polymer coating comprises a fluocarbon polymer.

6. The method of claim 5, wherein the protective polymer coating comprises CFx.

7. The method of claim 1, wherein depositing the protective polymer coating and plasma etching the substrate are performed in-situ in a processing chamber without removing the substrate from the chamber.

8. The method of claim 7, wherein depositing the protective polymer coating comprises a fluorocarbon deposition and etching the substrate comprises a CF4 etch.

9. The method of claim 8, wherein depositing the protective polymer coating is performed at a pressure of 0.3 to 1.0 Torr and an RF power of 50 to 100 W.

10. The method of claim 9, wherein depositing the protective polymer coating is performed with a flow rate of CF.sub.4 being 30 to 100 sccm.

11. The method of claim 8, wherein plasma etching the substrate is performed at a pressure of 0.3 to 1.0 Torr and an RF power of 300 to 1000 W.

12. The method of claim 10, wherein plasma etching the substrate is performed with a flow rate of CF.sub.4 being 30 to 100 sccm.

13. The method of claim 8, wherein depositing the protective polymer coating and etching are performed with the substrate at a temperature of 400-500 C.

14. The method of claim 8, wherein the substrate comprises a silicon wafer having a plurality of alternating Si/Ge and Si layers formed thereon, and the hardmask mask layer is formed on the plurality of alternating layers.

15. The method of claim 1, wherein the trenches have an aspect ratio of at least 5:1.

16. A plasma processing system, comprising: a vacuum chamber; a support to hold a substrate in the vacuum chamber; a fluorocarbon gas source; a hydrogen gas source; one or more RF power sources to apply RF power to the vacuum chamber; a controller coupled to the fluorocarbon gas source, the hydrogen gas source, and the one or more RF power sources and configured to flow fluorocarbon gas, hydrogen gas, and apply RF power to cause a protective polymer coating to be deposited on a dielectric film that coats top surfaces of fins, sidewalls, and bottoms of trenches on the substrate in the vacuum chamber, and cause the substrate to be plasma etched so as to remove the protective polymer coating and a portion of the dielectric film at the bottom of the trenches so as to increase the concavity of a top surface of a filled region at the bottom of the trenches.

17. The system of claim 16, wherein the controller is configured to cause the protective polymer coating to be deposited and cause the substrate to be plasma etched without removing the substrate from the chamber.

Description

DESCRIPTION OF DRAWINGS

[0014] FIG. 1A is a schematic cross-sectional view of a portion of a substrate having a trench with silicon nitride forming a relatively flat surface at the bottom of the trench.

[0015] FIG. 1B is a schematic cross-sectional view of a portion of a substrate having a trench with silicon nitride forming a convex surface at the bottom of the trench.

[0016] FIG. 1C is a schematic cross-sectional view of a portion of a substrate having multiple trenches that form multiple fins.

[0017] FIG. 1D is an image of a cross-section of a portion of a trench in a substrate.

[0018] FIG. 2 is a flow chart illustrating a process of modifying the silicon nitride layer.

[0019] FIGS. 3A-3D are schematic cross-sectional views of the substrate during the process of modifying the silicon nitride layer.

[0020] FIG. 4 is a schematic cross-sectional side view of a processing chamber that can be used to perform the process of FIGS. 2 and 3A-3D.

[0021] Like reference symbols in the various drawings indicate like elements.

DETAILED DESCRIPTION

[0022] When a dielectric film, e.g., silicon nitride, is deposited onto the surfaces of a deep trench, the dielectric material at the bottom of the trench will have a cross-sectional profile. This cross-sectional profile, which can also be called a contour, might have a generally flat section across the bottom of the trench and relatively sharp corners at the sidewalls. As integrated circuits become smaller, topographical control becomes more critical, and even the dielectric material at the bottom of the trench may need a more precisely controlled contour. Formation of such high aspect ratio trenches, particularly in a large array of trenches, is of particular importance in the fabrication of next-generation transistors, e.g., gate-all-around (GAA) field effect transistors (FETs).

[0023] This disclosure concerns a technique in which the profile of the dielectric material, e.g., silicon nitride, at the bottom of the trench is modified, thus permitting selection of the profile as concave instead of the incoming flat or convex configuration. This disclosure also concerns a technique in which the dielectric material, e.g., silicon nitride, is removed from the top of the fins with limited removal at the bottom of the trench.

[0024] FIG. 1A illustrates a portion of a substrate 10 that includes a semiconductor wafer 20 and optional additional layers 22 deposited on the wafer 20. For example, for a gate-all-around device, the additional layers 22 can include alternating layers 22a, 22b of SiGe and Si, respectively. The top surface of the wafer 20 and optional additional layers 22 can be covered by a hardmask mask layer 24, e.g., a silicon nitride mask layer.

[0025] Trenches 30 are formed in the substrate 10, including through the apertures in the mask layer 24 and into the wafer 20 and optional additional layers 22. These trenches 30 define fins 32, e.g., the fins of a GAA FET, that are separated by adjacent trenches 30. The trenches can be relatively deep, e.g., an aspect ratio of 4:1 or greater, such as up to 25:1, e.g., up to 10:1. Similarly, the fins can be relatively thin, e.g. an aspect ratio of 4:1 or greater, such as up to 25:1, up to 10:1. In addition, although only two fins are shown in FIG. 1A, there could a large number of fins uniformly spaced in an array, e.g., as shown in FIG. 1C. Due to the etching of the trench, the top surface 26 of the mask layer 24 on the fins 32 can be rounded.

[0026] A relatively thin dielectric film 40, e.g., a silicon nitride film, coats the substrate 10; it coats the sides of the trenches without filling the trenches. This silicon nitride film 40 can form a rounded top 42 on the top surface of the fins 32, i.e., on top of the mask layer 24. The silicon nitride film 40 also forms a coating 44 on the sidewalls of the trench 30 that is thinner than the portion at the rounded top. In addition, the silicon nitride film 40 creates a filled portion 46 at the bottom of the trench 30. The thickness of the rounded top 42 and filled portion 46 of the silicon nitride can be about 1.5 to 4 times the thickness of the silicon nitride coating 44 on the sidewalls. For example, the silicon nitride layer 40 can have an initial thicknesses (prior to the process described below) T1, T2, and T3 at the rounded top 42 of about 10-15 nm, at the bottom of about 8-12 nm, and along the sidewalls 44 of about 2-6 nm, e.g., 2-4 nm, respectively.

[0027] This structure can be formed by depositing a layer of hardmask material onto the top surface of the wafer 20 and optional additional layers 22, using photoresist-based photolithographic techniques to etch apertures through the hardmask material, and then stripping the photoresist to leave the resulting mask layer 24 of the hardmask material on the substrate 10. The substrate 10 can then be subjected to an etching process to etch away the exposed portion of the substrate 20 and optional additional layers 22, thus forming recesses in the wafer 20, thereby providing the trenches as a combination of the apertures through the mask layer 24 and optional additional layer 22 and the recesses in the wafer 20. The substrate can then be coated with the silicon nitride layer 40.

[0028] A standard manufacturing process generates a filled portion 46 at the bottom of the trench that has an upper surface 48 that is either generally flat (as shown in FIG. 1A) or convex (as shown in FIG. 1B). An image of a cross-section of a portion of a manufactured substrate in which the filled portion 46 of silicon nitride has a generally flat upper surface 48 and forms a relatively sharp corner 49 at the intersection with the side wall is shown in FIG. 1D. The boundary between the mask layer 24 and the silicon nitride coating 40 at the rounded top 24 is shown with a phantom line.

[0029] As described below, the profile of the silicon nitride layer 40 in the filled portion 46 at the bottom of the trench 30 can be modified, thus permitting selection of the profile as concave instead of the incoming flat or convex configuration.

[0030] FIG. 2 illustrates a method that includes a topographic control process (200) to control the contour of the silicon nitride layer at the bottom of the trench, and a selective removal process (210) that preferentially removes silicon nitride from the tops of the fins as opposed to removing silicon nitride from the bottom of the trenches. The topographic control process (200) includes depositing a first protective film (202) and then performing a reactive ion etch (204). The selective removal process (210) includes depositing a second protective film (212) and then performing a plasma mode etch (214). Each process (200), (210) could be used independently; they need not be used in combination.

[0031] As noted above, for topographic control, a two-step approach can be used that includes forming a first polymer protection layer (202), and then removal of the SiN using an etch process that has low selectivity of the top/bottom (204). In particular, a single chamber can be operated first in a deposition mode to form the polymer protection layer, and then in an etch mode that etches the polymer protection layer and the silicon nitride at the bottom of the trench (as well as on the tops of the fins).

[0032] Referring to FIGS. 2 and 3A, a carbon-containing layer 50 is deposited over the silicon nitride layer 40 (step 202). In particular, the carbon-containing layer 50 can be a fluorocarbon or fluoropolymer, e.g., a hydrogenated fluorocarbon or hydrogenated fluoropolymer. Specifically, the carbon-containing layer 50 can be CFx. The carbon-containing layer 50 can be deposited using an isotropic chemical vapor deposition, in particular plasma-enhanced chemical vapor deposition system.

[0033] The process can be performed at a pressure of 0.5-3.0 Torr, e.g., 0.5-2.0 Torr, an RF power of 50-300 W, a typical megahertz driving frequency, e.g., 27 MHz, and a substrate temperature of 400-500 C. The flow rate of the CF.sub.4 and the H.sub.2 can be approximately equal, e.g., in a range of 25-100 sccm and within 10% of each other. An inert gas, e.g., Ar, can be provided at a flow rate 3-10 times that of the combined flow rates of the CF.sub.4 and the H.sub.2, e.g., 200-1000 sccm. The process can run for 15-90 seconds.

[0034] Referring to FIGS. 2 and 3B, the substrate is then subjected to an anisotropic dry etch (step 204). Due to the directionality of the etch, the carbon-containing layer 50 is removed from the top surface of the fin 32 and the upper surface 48 of the filled portion 46 at the bottom of the trench 30. On the other hand, by running the process at moderate selectivity of the carbon-containing material versus the silicon nitride, after removal of the carbon-containing layer 50 at the bottom of the trench, the etching can continue into the silicon-nitride material, thus modifying the profile of the silicon nitride of the filled portion 46. In particular, if the upper surface 48 begins as generally flat, the etching will form a concave surface, with a degree of concavity depending on the etch time. If the upper surface 48 begins as convex, the etching can form a generally flat surface or a concave surface, depending on the etch time. This etching step could also remove material from the rounded tops, but this is acceptable as this silicon nitride is to be removed anyway.

[0035] The anisotropic etch can be performed in the same plasma chamber and using the same gas components, e.g., H.sub.2 and CF.sub.4, as the deposition process for the carbon-containing layer 50. However, simply changing the pressure, power, and/or gas flow ratio can change the deposition process to an etching process. In particular, to achieve an isotropic etch, the process can be run at relatively higher power than the deposition process, e.g., at 400-500 W instead of 100 W. In addition, the process can be run at equal and lower power pressure.

[0036] The etching process can be performed at a pressure of 0.3-1.0 Torr, an RF power of 100-1000 W, (e.g., 300-1000 W), a typical megahertz driving frequency, e.g., 27 MHz, and a substrate temperature of 400-500 C. The flow rate of the CF.sub.4 can be two to four times that of the H.sub.2, e.g., the flow rate of the CF.sub.4 can be about 60-100 sccm and the flow rate of the H.sub.2 can be about 15-50 sccm. An inert gas, e.g., Ar, can be provided at flow rate 5-20 times that of the combined flow rate of the CF.sub.4 and the H.sub.2, e.g., 200-1000 sccm. The process can run for 30-150 seconds.

[0037] If any of the first carbon-containing layer 50 remains on the substrate, it can be stripped.

[0038] For a selective top SiN removal, a two-step approach can be used that includes forming a polymer protection layer (212), and then removal of the SiN using an etch process that has top/bottom selectivity (214). In particular, a single chamber can be operated first in a deposition mode to form the polymer protection layer, and then in a selective etch mode that preferentially etches the polymer protection layer and the silicon nitride on the tops of the fins.

[0039] Referring to FIGS. 2 and 3C, a second carbon-containing layer 52 is deposited over the silicon nitride layer 40 (step 212). In particular, the second carbon-containing layer 52 can also be a fluorocarbon or fluoropolymer, e.g., a hydrogenated fluorocarbon or hydrogenated fluoropolymer. Specifically, the carbon-containing layer 50 can be CFx. The second carbon-containing layer 52 can be deposited using an isotropic chemical vapor deposition, in particular plasma-enhanced chemical vapor deposition system.

[0040] The process can be performed at a pressure of 2-4 Torr, an RF power of 50-300 W, a typical megahertz driving frequency, e.g., 27 MHz, and a substrate temperature of 400-500 C. The flow rate of the CF.sub.4 and the H.sub.2 can be approximately equal, e.g., in a range of 25-100 sccm and within 10% of each other. An inert gas, e.g., Ar, can be provided at a flow rate 3-10 times that of the combined flow rates of the CF.sub.4 and the H.sub.2, e.g., 200-1000 sccm. The process can run for 15-60 seconds.

[0041] The reaction can be described by the following: [0042] H.sub.2 molecule dissociation:

H.sub.2.fwdarw.2H, H=436 kJmol-1 [0043] Hydrogen dissociation from H-rich PECVD SiN:H film

SiH+NH.fwdarw.2 SiH+H.sub.2, energy change 1.86 eV [0044] CFx Polymer formation

CF.sub.4+H.fwdarw.HF+CF.sub.3, reaction enthalpies 26.3 KJ/mol

2CF.sub.4+H2.fwdarw.CHF.sub.2+CF.sub.2+2F

SIN+CF.sub.4+H.sub.2.fwdarw.CFx+HCN+FCN+HF+SiFx (Volatile)

[0045] The CFx is thus deposited to form a thin layer, e.g., 1 nm thick, of polymer.

[0046] Without being limited to any particular theory, this process has a relatively low etch rate of the underlying SiN because i) the CF.sub.4 does not easily to react with the SiN due to the formation of the thin polymer layer protection, and ii) F.sub.2+H.sub.2.fwdarw.2HF reaction increases with higher power, so the excited H starts to scavenge fluorine.

[0047] Referring to FIGS. 2 and 3D, the substrate is then subjected to another plasma etch (step 214). In this step, the process parameters are set such that, in conjunction with the high aspect ratio of the trench, the silicon nitride and carbon-containing layer at the top of the fin 30 is preferentially etched in comparison to the silicon nitride and carbon-containing layer at the bottom of the trench. As a result, both the silicon nitride film 40 and a portion of the hard mask 24 on the top of the fins 32 can be removed. This can leave the fins with a more planar top surface 26.

[0048] As compared to the depositing the polymer protective layer, the selective etching step is performed at a significantly lower pressure, e.g., by a factor of 3-6, at a higher power, e.g., by a factor of 3-8, and with a higher percentage of CF.sub.4.

[0049] In comparison to the etch for topographic control (in step 204), the etch for selective removal (in step 214) can be conducted at higher pressure.

[0050] The selective etching process can be performed at a pressure of 0.3-1.0 Torr, an RF power of 300-1000 W, a typical megahertz driving frequency, e.g., 27 MHz, and a substrate temperature of 400-500 C. The flow rate of the CF.sub.4 can be two to four times that of the H.sub.2, e.g., the flow rate of the CF.sub.4 can be about 60-100 sccm and the flow rate of the H.sub.2 can be about 15-50 sccm. An inert gas, e.g., Ar, can be provided at flow rate 5-20 times that of the combined flow rate of the CF.sub.4 and the H.sub.2, e.g., 200-1000 sccm. The process can run for 30-150 seconds.

[0051] The reaction can be described by the following: [0052] CF.sub.4 dissociation (resulting in more free fluorine)

CF.sub.4.fwdarw.CF.sub.3+F, reaction enthalpies 539.8 kJ/mol [0053] CF.sub.4 can dissociate at higher RF power condition [0054] Hydrogen dissociation from H-rich PECVD SiN: H film

SiH+NH.fwdarw.2 SiH+H2, energy change 1.86 eV [0055] CF.sub.4 reaction with SiN

[0056] Spontaneous reaction of free fluorine with SiN

12F+Si.sub.3N.sub.4.fwdarw.3 SiF.sub.4+2 N.sub.2

[0057] Without being limited to any particular theory, this process has a higher etch rate of the SiN because i) the CF.sub.4 dissociation (which results in more free fluorine) can occur due to higher RF energy, ii) the resulting free fluorine will have higher energy, which increases the probability of fluorine radicals going deeper into SiN and reacting with Si, and iii) the hydrogen disassociation increases outflux of hydrogen from SiN and creates extra dangling bonds.

[0058] In addition, still without being limited to any particular theory, free fluorine reacts very readily, and therefor is more likely to react with the nitride at the top of the fins than at the bottom of the trench simply because the longer distance results in a longer travel time to the bottom of high aspect ratio trench.

[0059] If any of the second carbon-containing layer 52 remains on the substrate, it can be stripped.

[0060] FIG. 4 illustrates an example of a plasma reactor 300 that can be used to carry out the method. Chamber walls 310 enclose a processing chamber 312 in which a pedestal 314 can support the substrate 10. A vacuum pump 316 can create vacuum conditions in the chamber 312 suitable for plasma processing, e.g., 0.1 to 5 Torr. A faceplate 320 with apertures 322 therethrough can extend across the chamber 312 above the pedestal 214, dividing the chamber 312 into an upper portion 312a and a lower portion 312b. Process gasses from process gas sources 330 can flow into the upper chamber 312a through ports 332 in a chamber lid 334. The process gas sources 330 can include a CF.sub.4 source, a H.sub.2 source and an inert gas source, e.g., an Ar source. Process gas sources can be a dedicated canister containing the gas, or a facilities line.

[0061] The process gas sources can include fluid delivery lines and valves to control the flow rate from of gas into the chamber.

[0062] RF power can be applied by an RF source 340 to the chamber lid 334 and/or RF power can be applied by an RF source 342 to the pedestal 314 in order to generate a plasma. Alternatively or in addition, coils can surround and/or be placed above the chamber 312 to generate an inductively coupled plasma.

[0063] A controller 350, can be coupled to the RF sources 340, 342 in order to control the applied RF power, to the vacuum pump 316 to control the pressure in the chamber 312, and to the process gas sources 330 to control the respective flow rates of the respective process gasses. Thus, the controller 350 can operate the plasma reactor according to a process recipe to carry out the methods described above.

[0064] The 350 controller can include a central processing unit (CPU), a memory, and support circuits, e.g., input/output circuitry, power supplies, clock circuits, cache, and the like. The memory is connected to the CPU. The memory is a non-transitory computable readable medium, and can be one or more readily available memory such as random access memory (RAM), read only memory (ROM), floppy disk, hard disk, or other form of digital storage. In addition, the controller 350 can be implemented as a single computer, or the controller could be a distributed system, e.g., including multiple independently operating processors and memories.

[0065] The plasma reactor 300 can include other components, such as a heater embedded in the pedestal or positioned near the floor of the chamber, lift pins in the pedestal, a slit valve for a robot arm to insert the substate onto the pedestal, etc.

Example

[0066] The protective polymer film was deposited (for step 212) in a Precision-XP chamber at a pressure of 3 Torr, an RF power of 100 W, an RF frequency of 27 MHz, and with a substrate temperature of 450 C. The flow rate of CF.sub.4 was 50 sccm, the flow rate of H.sub.2 was 50 sccm, and the flow rate of Ar was 500 sccm. The process was run for 30 seconds.

[0067] The selective etching of the silicon nitride at the top of the fins (for step 214) was performed in a Precision-XP chamber at a pressure of 0.5 Torr, an RF power of 500W, an RF frequency of 27 MHz, and with a substrate temperature of 450 C. The flow rate of CF.sub.4 was 75 sccm, the flow rate of H.sub.2 was 25 sccm, and the flow rate of Ar was 500 sccm. The process was run for 90 seconds.

[0068] A number of embodiments have been described. However, many variations are possible. For example, rather than the complicated channel and fin shapes described above, the fins can be simple linear stripes with a width selected to provide the desired percentage of contact area. For example, the trailing and leading edge of each fin can be provided by two parallel linear segments. The edges can be rounded at the inner and outer diameter surfaces.

[0069] In addition, although the description above has focused on the dielectric film 40 being a silicon nitride film, the process can is applicable to dielectric films of other compositions, e.g., silicon oxide.

[0070] Thus, the scope of the invention is defined by the appended claims.