Method for producing semiconductor wafers

Abstract

A semiconductor single-crystal silicon, is produced from a silicon substrate wafer containing interstitial oxygen in a concentration of more than 510.sup.16 AT/cm.sup.3 (new ASTM) by an RTA treatment of the wafer in a first heat treatment at a first temperature in a temperature range of not less than 1200 C. and not more than 1260 C. for a period of not less than 5 s and not more than 30 s, where the front side of the substrate wafer is exposed to an atmosphere containing argon; a second heat treatment at a second temperature in a temperature range of not less than 1150 C. and not more than 1190 C. for a period of not less than 15 s and not more than 20 s, where the front side of the wafer is exposed to an argon and ammonia, atmosphere, and a third heat treatment at a third temperature in a temperature range of not less than 1160 C. and not more than 1190 C. for a period of not less than 20 s and not more than 30 s, where the front side of the wafer is exposed to an atmosphere containing argon.

Claims

1. A process for producing a semiconductor wafer of single-crystal silicon, comprising: providing a substrate wafer of single-crystal silicon containing interstitial oxygen in a concentration of more than 510.sup.16 AT/cm.sup.3 (new ASTM); treating of the substrate wafer by RTA in a first heat treatment at a first temperature in a temperature range of not less than 1200 C. and not more than 1260 C. for a period of not less than 5 s and not more than 30 s, during which a front side of the substrate wafer is exposed to an atmosphere containing argon, treating the substrate wafer in a second heat treatment at a second temperature in a temperature range of not less than 1150 C. and not more than 1190 C. for a period of not less than 15 s and not more than 20 s, during which the front side of the substrate wafer is exposed to an atmosphere containing argon and ammonia, and treating the substrate wafer in a third heat treatment at a third temperature in a temperature range of not less than 1160 C. and not more than 1190 C. for a period of not less than 20 s and not more than 30 s, during which the front side of the substrate wafer is exposed to an atmosphere containing argon.

2. The process of claim 1, wherein the time between the beginning of the first heat treatment and the end of the third heat treatment is not more than 320 s.

3. The process of claim 1, wherein the minimum temperature of the substrate wafer both between the first and the second heat treatment and between the second and the third heat treatment is not less than 600 C.

4. The process of claim 3, wherein the minimum temperature of the substrate wafer both between the first and the second heat treatment and between the second and the third heat treatment is not less than 750 C.

5. The process of claim 1, wherein the atmosphere in the second heat treatment contains not less than 40% and not more than 60% NH.sub.3.

6. The process of claim 1, wherein the substrate wafer has a concentration of interstitial oxygen of not less than 4.510.sup.17 atoms/cm.sup.3 (new ASTM) and not more than 5.210.sup.17 atoms/cm.sup.3 (new ASTM).

7. The process of claim 1, wherein the substrate wafer was obtained from a silicon crystal produced by a Czochralski pulling process, wherein during the pulling the partial pressure of H.sub.2 in the atmosphere in the pulling apparatus does not fall below 20 Pa.

8. The process of claim 7, wherein the partial pressure of H.sub.2 is not more than 50 Pa.

9. The process of claim 1, wherein the substrate wafer has a P.sub.i region in which interstitial silicon atoms dominate.

10. The process of claim 9, wherein the substrate wafer contains a P.sub.v region having a size of less than 30% of the substrate wafer in which silicon vacancies dominate.

11. The process of claim 10, wherein the P.sub.v region contains a P.sub.bmd region in which oxygen precipitates present have a size of not more than 9 nm.

12. The process of claim 10, wherein the P.sub.v region contains a P.sub.bmd region in which oxygen precipitates present have a size of not more than 6 nm.

13. The process of claim 1, wherein the substrate wafer has a diameter of not less than 300 mm.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 shows the temperature range of the respective i.sup.th RTA step, wherein the abscissa shows the index i of the particular RTA step. T describes the individual temperatures of the process according to the invention while in comparison T: DE 10 2016 225 138 A1 shows the temperatures of a prior art process.

(2) FIG. 2 shows the radial distribution of the defects after thermal treatment of a test wafer. The regions B1 and B2 show the regions preferred for the invention in which a test wafer must be located to be suitable for the thermal process. W1 and W2 show radial defect densities of two different test wafers, wherein W1 meets the requirements and W2 does not.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

(3) Producing a semiconductor wafer of single-crystal silicon according to the invention comprises growing a single crystal by the CZ method, cutting-to-size crystal pieces and producing at least one test wafer from the respective crystal piece, cutting substrate wafers from a crystal piece and further processing the substrate wafers to afford semiconductor wafers.

(4) One property of the substrate wafers thus obtained which is essential to the invention is that oxygen is present in a concentration of more than 510.sup.16 At/cm.sup.3 (new ASTM). It is not absolutely necessary to use the CZ method.

(5) The further processing of the substrate wafers to afford semiconductor wafers preferably comprises mechanically processing the substrate wafers cut from the single crystal by lapping and/or grinding, removing near-surface damaged crystal regions by etching and pre-cleaning the substrate wafers in SC1 solution, SC2 solution and ozone.

(6) During growth of the single crystal the melt is preferably subjected to a magnetic field, most preferably a horizontal magnetic field or a CUSP magnetic field. The quotient v/G of pulling velocity v and axial temperature gradient G at the phase interface is controlled such that the semiconductor wafer of single-crystal silicon obtained by further processing the single crystal either consists completely of P.sub.i region or additionally contains a P.sub.v region.

(7) The pulling velocity v during growing of the single crystal is preferably not less than 0.45 mm/min provided the intention is to produce semiconductor wafers having a diameter of 300 mm.

(8) The optimal pulling velocity during pulling may be found by varying the pulling velocity of a crystal piece with increasing length of the crystal. A rectangular wafer (a so-called plank) may be cut out of the thus-obtained crystal piece by means of two longitudinal cuts running along the center of the crystal piece, so that the position on one side of the rectangular wafer corresponds to the employed pulling velocity. Analyzing the wafer makes it possible to precisely assign defect properties to a pulling velocity and thus find the desired pulling velocity.

(9) A single crystal is preferably grown in an atmosphere of argon or, more preferably, in an atmosphere containing argon and hydrogen. The partial pressure of hydrogen is most preferably less than 30 Pa. The partial pressure is here calculated according to Dalton's law assuming an ideal gas. The following equation applies:

(10) $\frac{n_i}{n_{ges}}=\frac{p_i}{p_{ges}}$
wherein n.sub.i is the amount of substance of the i.sup.th component, n.sub.tot is the total amount of substance, p.sub.tot is the pressure and p.sub.i is the partial pressure of the i.sup.th component.

(11) The substrate wafers of single-crystal silicon obtained from the single crystal have a concentration of oxygen of not less than 4.510.sup.17 atoms/cm.sup.3 and not more than 5.210.sup.17 atoms/cm.sup.3 (new ASTM). It is known that the concentration of oxygen in the single crystal may be adjusted during production thereof, for example by controlling the rotational velocity of the crucible and/or of the single crystal and/or by controlling the pressure and/or the flow rate of the gas forming the atmosphere in which the single crystal is grown and/or by controlling the magnetic field strength of the magnetic field to which the melt is subjected.

(12) An IR-LST laser tomograph from SemiLab was employed with a laser output of 50-80 mW and a defect size resolution range of 20 nm-60 nm to determine the defect density on a test wafer. When the measured defect density on the overall test wafer was less than 510.sup.4 1/cm.sup.3 it was assumed that the accompanying crystal piece is free from COPs.

(13) The inventors have recognized that it is particularly advantageous to use substrate wafers that only include oxygen precipitates having a size smaller than 9 nm, preferably smaller than 6 nm. Testing may be undertaken on the substrate by means of TEM (transmission electron microscopy) for example.

(14) The region on the substrate wafer that includes seeds of oxygen precipitates is also referred to as a P.sub.bmd region.

(15) As a test for the occurrence of such oxygen precipitates having the described properties the inventors performed the following process.

(16) A test wafer is introduced into an oven (horizontal or vertical) under an N.sub.2 atmosphere at 880-920 C. and held therein for 6-10 hours; this is followed by heating to 1080-1120 C. and wet oxidation with O.sub.2/H.sub.2 is carried out for a holding time of 1.5-2.5 hours. The test wafer is subsequently cooled under a pure O.sub.2 atmosphere. All heating and cooling rates are in the range of 5-10 K/min. The test wafer is then subjected to a Secco etch with a material removal of 5-10 m and the defects occurring are detected using a radially scanning optical microscope and the density thereof determined.

(17) When the measured defect density over the entire front side of the test wafer is smaller than 50 defects/cm.sup.2 it is assumed that any oxygen precipitates present are smaller than 6 nm.

(18) When the measured defect density in a circle on the front side of the test wafer which shares its center with the front side of the test wafer and whose radius is not more than 50 mm is more than 50 defects/cm.sup.2 and less than 75 defects/cm.sup.2 and on the remainder of the test wafer is less than 50 defects/cm.sup.2, it is assumed that the size of any oxygen precipitates present is smaller than 9 nm.

(19) By way of example experimentally determined defect densities of two test wafers W1 and W2 are shown in FIG. 2. Test wafer W1 accordingly meets the requirements and W2 does not.

(20) To determine the size of the oxygen precipitates numerical simulations were performed analogously to the Mller et al publication, wherein the boundary conditions were correspondingly adapted.

(21) The inventors have additionally recognized that the substrate wafers preferably comprise a P.sub.i region in which interstitial silicon atoms dominate but do not yet form dislocation loops, i.e. so-called LPITs.

(22) Measurement for any LPITs was carried out by microscopy counting of the defects found on the surface of the substrate wafer after performing initially a bright etch (material removal 70 m) and subsequently a Secco etch for 16 min.

(23) It is preferable when the substrate wafers additionally have a P.sub.v region in which silicon vacancies dominate but do not form aggregates larger than 10 nm. This region is preferably smaller than 80% of the area of the substrate wafers.

(24) The RTA treatment comprises a first rapid heating of the substrate wafers of single-crystal silicon to a temperature in a temperature range of not less than 1200 C. and not more than 1260 C. and holding the substrate wafers in this temperature range over a period of not less than 5 seconds and not more than 30 seconds. The first heat treatment is performed in an atmosphere containing and preferably consisting of argon.

(25) The subsequent second heat treatment comprises rapid heating of the substrate wafers of single-crystal silicon to a temperature in a temperature range of not less than 1150 C. and not more than 1190 C. and holding the substrate wafers in this temperature range over a period of not less than 15 seconds and not more than 20 seconds in an atmosphere containing argon and ammonia and preferably consisting of argon and ammonia (NH.sub.3).

(26) The preferred RTA treatment is shown schematically in FIG. 1.

(27) The volume ratio Ar:NH.sub.3 is preferably not less than 10:10 and not more than 10:5, more preferably 10:8. The flow rate of the gas mixture through the RTA oven is preferably not less than 2 slm and not more than 5 slm.

(28) After the second heat treatment in an atmosphere comprising argon and ammonia, the substrate wafer of single-crystal silicon is subjected to a third heat treatment at a temperature in a temperature range of not less than 1160 C. and not more than 1190 C. over a period of not less than 20 seconds and not more than 30 seconds in an inert atmosphere which contains argon and preferably consists of argon.

(29) The composition of the atmosphere is altered during the respective heat treatment and the heat treatment of the substrate wafers continued at constant temperature.

(30) As an alternative it is preferable between the second and the third heat treatment to initially cool the substrate wafers to not less than 600 C., purge the RTA oven with nitrogen until free from ammonia and subsequently bring the substrate wafers to the target temperature of the third heat treatment in an inert atmosphere.

(31) The further treatment of the substrate wafers in the inert atmosphere is of particular importance since this sufficiently reduces the density of vacancies in the region of the denuded zone, thus preventing oxygen precipitates from being able to reform there.

(32) The rapid heating of the substrate wafers of single-crystal silicon in the course of the first and the second heat treatment is carried out from a temperature of 600 C. up to the target temperature preferably at a rate of temperature increase of not less than 15 K/s, more preferably not less than 25 K/s.

(33) In contrast to the conventional teaching (Mller et al.) that a low concentration (for example 1% O.sub.2) of oxygen in the atmosphere for the first heat treatment step is necessary to dissolve oxygen precipitates close to the surface (denuded zone), a deleterious effect in the absence of oxygen during the first heat treatment was surprisingly not observed.

(34) It is advantageous when the time elapsing between the beginning of the first heat treatment and the end of the last heat treatment is not more than 320 seconds. The beginning and the end of the heat treatment are to be understood as the time at which the substrate wafer achieves a temperature of 600 C.

(35) After RTA treatment the substrate wafer of single-crystal silicon is polished, preferably by DSP (double-sided polishing), i.e. by simultaneous polishing of the upper and lower side surface followed by polishing of a notch on the substrate wafers and polishing of an edge of the substrate wafer. It is typically the region of the upper side surface, the front side of the thus obtained semiconductor wafer, that is used for constructing electronic components and therefore a final polishing of the front side by CMP (chemical mechanical polishing) is particularly preferred. The polished semiconductor wafer is then preferably subjected to final cleaning and drying.

(36) A semiconductor wafer of single-crystal silicon produced according to the above-described process is particularly suitable for producing electronic components with NAND logic, including under conditions which provide a relatively small thermal budget. Requirements for this suitability include a denuded zone which is relatively deep, a high dielectric strength of a gate oxide produced on the semiconductor wafer and the ability to form a high density of BMDs in the inner region of the semiconductor wafer despite a comparatively low concentration of oxygen and despite an available thermal budget for producing the BMDs which is comparatively low.