Vertical HEMT and a method to produce a vertical HEMT

Abstract

There is provided a vertical high-electron-mobility transistor, which may include: a drain contact a nanowire layer arranged on the drain contact and at least one vertical nanowire and a supporting material laterally enclosing the at least one vertical nanowire, a heterostructure arranged on the nanowire layer and comprising an AlGaN-layer and a GaN-layer together forming a heterojunction, at least one source contact in contact with the heterostructure, and a gate contact in contact with the heterostructure, arranged above the at least one vertical nanowire, the at least one vertical nanowire is forming an electron transport channel. Also disclosed is a method for producing same.

Claims

1. A vertical high-electron-mobility transistor, HEMT, comprising: a drain contact laterally enclosed by an AlN-layer, a nanowire layer arranged on the drain contact and on the AlN-layer laterally enclosing the drain contact, the nanowire layer comprising at least one vertical nanowire, being a wire with a diameter in a range from 10 to 500 nm, and a supporting material laterally enclosing the at least one vertical nanowire, a heterostructure arranged on the nanowire layer and comprising an AlGaN-layer and a GaN-layer together forming a heterojunction, at least one source contact in contact with the heterostructure, the at least one source contact being laterally offset from the at least one vertical nanowire, and a gate contact in contact with the heterostructure, arranged above the at least one vertical nanowire, wherein the at least one vertical nanowire is forming an electron transport channel between the drain contact and the heterostructure.

2. The vertical HEMT according to claim 1, wherein the at least one vertical nanowire at a first end thereof is in direct contact with the drain contact and at a second end thereof is in direct contact with the heterostructure.

3. The vertical HEMT according to claim 1, wherein the material of the at least one vertical nanowire is different from the supporting material.

4. The vertical HEMT according to claim 1, wherein the at least one vertical nanowire comprises GaN.

5. The vertical HEMT according to claim 1, wherein the at least one vertical nanowire comprises n-doped GaN and wherein the supporting material comprises p-doped GaN.

6. The vertical HEMT according to claim 1, wherein the supporting material is configured to be a current blocking layer.

7. The vertical HEMT according to claim 1, wherein the at least one vertical nanowire is laterally aligned with the gate contact.

8. The vertical HEMT according to claim 1, wherein the length of the at least one vertical nanowire is in the range from 50 nm to 500 nm.

9. The vertical HEMT according to claim 1, wherein the nanowire layer comprises a plurality of vertical nanowires.

10. The vertical HEMT according to claim 1, wherein the GaN-layer is arranged on the AlGaN-layer.

11. The vertical HEMT according to claim 8, wherein the length of the at least one vertical nanowire is in the range from 150 nm to 250 nm.

12. A method for producing a vertical HEMT, the method comprising: providing a base layer wherein the base layer comprises a substrate and an AlN-layer arranged on the substrate, forming a nanowire layer on the base layer, wherein the nanowire layer comprises at least one vertical nanowire, being a wire with a diameter in a range from 10 to 500 nm, and a supporting material laterally enclosing the at least one vertical nanowire, depositing a heterostructure on the nanowire layer and in contact with the at least one vertical nanowire, the heterostructure comprising an AlGaN-layer and a GaN-layer together forming a heterojunction, forming at least one source contact in contact with the heterostructure, the at least one source contact being laterally offset from the at least one vertical nanowire, forming a gate contact in contact with the heterostructure and arranged above the at least one vertical nanowire, and forming a drain contact laterally enclosed by the AlN layer, the drain contact being in contact with the at least one vertical nanowire, wherein the at least one vertical nanowire forms an electron transport channel between the drain contact and the heterostructure.

13. The method according to claim 12, wherein the substrate is a silicon substrate.

14. The method according to claim 13, wherein the method further comprises: separating the substrate from the AlN-layer, forming a trench in the AlN-layer, exposing the at least one vertical nanowire, and wherein the step of forming the drain contact comprises forming the drain contact in the trench.

15. The method according to claim 14, wherein the method further comprises joining the substrate or another substrate to the AlN-layer and/or the drain contact.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The above and other aspects of the present invention will, in the following, be described in more detail with reference to appended figures. The figures should not be considered limiting; instead they should be considered for explaining and understanding purposes.

(2) As illustrated in the figures, the sizes of layers and regions may be exaggerated for illustrative purposes and, thus, are provided to illustrate the general structures. Like reference numerals refer to like elements throughout.

(3) FIGS. 1a-b show side views of vertical HEMTs.

(4) FIG. 2 shows a flow chart for methods of producing vertical HEMTs.

DETAILED DESCRIPTION

(5) The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which currently preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided for thoroughness and completeness, and to fully convey the scope of the invention to the skilled person.

(6) FIG. 1a shows a vertical HEMT 100. The vertical HEMT 100 comprises a drain contact 410.

(7) The drain contact 410 may, as shown, be arranged on a substrate 310. The substrate 310 may be a silicon, Si, substrate. The substrate may have a Miller index of <111>.

(8) The drain contact 410 may also be laterally enclosed by an AlN-layer 320.

(9) The vertical HEMT 100 comprises a nanowire layer 500 arranged on the drain contact 410. The nanowire layer 500 may comprise at least one vertical nanowire 510 and a supporting material 520 laterally enclosing the at least one vertical nanowire 510.

(10) The at least one vertical nanowire 510 forms an electron transport channel between the drain contact 410 and the heterostructure 600.

(11) The at least one vertical nanowire 510 may comprise a first end 511 and a second end 512 at two opposite vertical boundaries of the vertical nanowire. The first end 511 may be in direct contact with the drain contact 410. The second end 512 may be in direct contact with the heterostructure 600.

(12) The at least one vertical nanowire 510 may be laterally aligned with the gate contact 430 as is shown to be the case in FIG. 1a.

(13) The length, L, of the at least one vertical nanowire 510 may be in the range from 50 nm to 500 nm, and may preferably be in the range from 150 nm to 250 nm.

(14) The at least one vertical nanowire 510 may have a hexagonal or a circular radial cross section. The at least one vertical nanowire 510 may have a diameter in the range from 10 to 500 nm for confinement of the density of states in the radial direction. The diameter of the at least one vertical nanowire 510 may preferably be in the range from 10 to 100 nm. The diameter may be fix along the length of the at least one nanowire 510. The diameter, and indeed also the radial cross section shape, may change along the length of the at least one nanowire 510.

(15) The at least one vertical nanowire 510 may comprise GaN.

(16) The material of the at least one vertical nanowire 510 may be different from the supporting material 520.

(17) The at least one vertical nanowire 510 may comprise n-doped GaN. GaN may be n-doped by doping with C or Si impurity atoms. The supporting material 520 may comprise p-doped GaN. GaN may be p-doped by doping with Mg impurity atoms.

(18) The supporting material 520 may be configured to be a current blocking layer.

(19) The nanowire layer 500 may comprise a plurality of vertical nanowires 510. The plurality of vertical nanowires 510 may be arranged laterally in a square array or a hexagonal array.

(20) The vertical HEMT 100 comprises a heterostructure 600 arranged on the nanowire layer. The heterostructure 600 may comprise an AlGaN-layer 610 and a GaN-layer 620 that together form a heterojunction.

(21) The GaN-layer 620 may be arranged on the AlGaN-layer 610.

(22) The GaN-layer 620 may comprise or substantially consist of GaN. The AlGaN-layer 610 may comprise or substantially consist of AlGaN. AlGaN may feature many different elemental composition ratios. In general, AlGaN should be considered to be Al.sub.xGa.sub.1-xN, wherein 0<x<1

(23) The vertical HEMT 100 comprises at least one source contact 420a, 420b in contact with the heterostructure 600. The at least one source contact 420a, 420b should however be laterally offset from the at least one vertical nanowire 510.

(24) The vertical HEMT 100 may comprise a plurality of source contacts 420a, 420b, as shown in FIG. 1a. The shown configuration may alternatively be understood as a setup with multiple source contact fingers 420a, 420b, that are essentially integral and correspond to the same electrical node. The placement of the multiple source contact fingers 420a, 420b laterally equidistant around the center of the at least one vertical nanowire 510, may be preferable for a more even spread throughout the heterostructure 600 and the at least one nanowire 510.

(25) For the same reasons, the source contact 420a, 420b may alternatively be circular in shape, centered around an extended centerline of the at least one vertical nanowire 510.

(26) In cases with a plurality of vertical nanowires 510, the source contact 420a, 420b may be configured as a grid in which substituent grid elements are consistent across the grid in how they correspond to each individual vertical nanowire 510. E.g. the closest distance between any point of a vertical nanowire 510 and any point of the source contact 420a, 420b should preferably be equal for each individual vertical nanowire 510.

(27) The vertical HEMT 100 comprises a gate contact 430 in contact with the heterostructure 600, arranged above the at least one vertical nanowire 510.

(28) The gate contact 430, the at least one source contact 420a, 420b, and the drain contact 410 may comprise or substantially consist of metal material. Examples of metal materials available for use, by themselves or in an alloy/compound, may include Cu, Al, Pd, Au, Ag, Ni, Ti, W.

(29) With reference to FIG. 1a, the vertical HEMT operation may be described as the gate contact 430 receiving a voltage. The voltage may be a positive voltage. If the voltage is large enough, a 2DEG may form at the heterojunction, i.e. the interface between the AlGaN-layer 610 and the GaN-layer 620, and open the transistor for conducting currents between the source contact 420a, 420b and drain contact 410 via the at least one nanowire 510. The path of the current may be along the heterojunction until it approaches the part of the heterojunction closest to the at least one vertical nanowire 510. The current now transits to the at least one vertical nanowire 510 continue flowing toward the drain contact 430. The interfaces between the different structures and layers in the currents path may be optimized to feature substantially ohmic conduction across each interface.

(30) FIG. 1b shows a slightly altered version of the vertical HEMT 100 that also includes a top oxide-layer 700. Such an oxide-layer 700 may beneficially reduce current leakage between e.g. the gate contact 430 and the source contacts 420a, 420b and better insulate and passivate the vertical HEMT.

(31) FIG. 1b also shows an example of the nanowire layer 500 comprising a plurality of vertical nanowires 510. In the figure two similar nanowires are shown in parallel with each other. In this case the gate contact 430 aligned with a central point between the two vertical nanowires 510 instead of the at least one vertical nanowire as is shown in FIG. 1a.

(32) FIG. 2 shows a flowchart for a method of producing a vertical HEMT 100. Optional steps are indicated by dashed boxes in the flowchart.

(33) The method comprises providing S2020 a base layer 300 wherein the base layer 300 comprises a substrate 310.

(34) The substrate 310 may be a silicon substrate. The base layer 300 may comprise an AlN-layer 320 arranged on the substrate 310. The AlN-layer 320 may be formed by a suitable deposition technique, e.g. sputtering or chemical vapor deposition, CVD, onto the substrate 310. Sputtered AlN may be advantageous as it may provide a low density of charge traps, e.g. a low density of charge traps at the interface between the AlN-layer 320 and a substrate.

(35) The method comprises forming S2030 a nanowire layer 500 on the base layer 300. The nanowire layer 500 comprises at least one vertical nanowire 510 and a supporting material 520 laterally enclosing the at least one vertical nanowire 510.

(36) The at least one vertical nanowire 510 may be formed by selective area growth epitaxial techniques, e.g. using metal organic vapor phase epitaxy, MOVPE, or by selectively etching out the vertical nanowire 510 from a bulk layer of semiconductor material e.g. by plasma etching using chloride chemistry Ar/Cl. The step of forming the at least one vertical nanowire 510 may comprise using lithography-based pattern transfer techniques to define the intended position and geometry of the at least one nanowire 510.

(37) The supporting material 520 may be formed by deposition techniques such as e.g. MOVPE or CVD to enclose the at least one vertical nanowire 510 or fill in the space between nanowires 510 if a plurality of them are present.

(38) The method comprises depositing S2040 a heterostructure 600 on the nanowire layer 500 and in contact with the at least one vertical nanowire 510.

(39) The heterostructure 600 may be deposited by similar techniques to the at least one vertical nanowire 510, i.e. MOVPE.

(40) The step of depositing S2040 the heterostructure 600 may comprise depositing an AlGaN-layer 610, and depositing a GaN-layer 620. The AlGaN-layer 610 and the GaN-layer 620 may together form a heterojunction.

(41) The first layer of the heterostructure 600, e.g. the AlGaN-layer 610, may be deposited onto the nanowire layer 500. The second layer of the heterostructure, in that case the GaN-layer 620, may then be deposited onto the AlGaN-layer 610.

(42) The method comprises forming S2050 at least one source contact 420a, 420b in contact with the heterostructure 600.

(43) The source contact 420a, 420b may be formed by depositing techniques such as evaporation or sputtering. The source contact 420a, 420b may, as shown in FIG. 1a, be formed vertically through the heterostructure 600, and onto the nanowire layer 500. This result may be achieved by pattern transfer and selective area etching through the heterostructure before deposition of the source contact 420a, 420b.

(44) The method comprises forming S2060 a gate contact 430 in contact with the heterostructure. The gate contact 430 may be formed using deposition techniques similar to those suggested for the source contact 410a, 410b. The gate contact 430 may be formed onto the heterostructure 600 as shown in FIG. 1a. In FIG. 1b, where the oxide-layer 700 is present, etching may first be used to create a trench for the gate contact 430 through the oxide-layer.

(45) The method may further comprise separating S3020 the substrate 310 from the AlN-layer 320 using substrate removal or separation techniques.

(46) The method may further comprise forming S3030 a trench in the AlN-layer 320, exposing the at least one vertical nanowire 510. The step of forming the drain contact 410 may in this case comprise forming the drain contact 410 in the trench. The trench may act as a mold for the drain contact 410. As such, the trench shares its geometry with the drain contact 410 in FIGS. 1a-b.

(47) The trench may be formed by selective area etching, from below as seen in the figures, through the AlN-layer 320 to.

(48) The method comprises forming S2070 a drain contact 410 in contact with the at least one vertical nanowire 510. The drain contact 410 may be formed using deposition techniques similar to those suggested for the source contact 410a, 410b and gate contact 430.

(49) The forming of the drain contact 410 may also comprise preceeding etching, from the bottom and through, the substrate 310. Trenches may be selectively etched through an oxide-layer of the substrate bottom surface. The remaining bottom substrate oxide-layer may then be used as a mask layer for dry reactive ion etching of the substrate 310.

(50) The method may further comprise joining S4020 the substrate 310 or another substrate to the AlN-layer 320 and/or the drain contact 410. The joining step S4020 may entail joining a previously used substrate 310, separated from the rest of the structure in step S3020, or it may entail joining an entirely different substrate. If precise alignment is desired in joining, automated stepper equipment may be employed to aid during step. The joining step S4020 may entail joining a substrate with a trench to the AlN-layer. The trench may be of the same size as the drain contact 410 and align with the drain contact 410. Thus, the substrate may be joined to the AlN-layer but not to the drain contact 410, as the trench in the substrate may prevent contact between the substrate and the drain contact 410. Alternatively, the trench may be of a similar size as the drain contact 410, e.g. between 1 and 5 times the size of the drain contact 410, and align with the drain contact 410. Thus, the substrate may be joined to the AlN-layer but not to the AlN-layer in a region around the drain contact 410.

(51) Additionally, variations to the disclosed embodiments can be understood and effected by the skilled person in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims.