Liquid crystal display and method of manufacturing the same
09851598 · 2017-12-26
Assignee
Inventors
Cpc classification
G02F1/133377
PHYSICS
H01L27/124
ELECTRICITY
International classification
G02F1/1335
PHYSICS
Abstract
A liquid crystal display according to an exemplary embodiment includes: a substrate; a thin film transistor disposed on the substrate; a pixel electrode connected to the thin film transistor; and color filters disposed to face the pixel electrode, wherein a plurality of microcavities are between the pixel electrode and the color filters, the microcavities form a liquid crystal layer including a liquid crystal material, the microcavities are divided by a partition portion, and the partition portion is formed by a color filter of one color among the color filters.
Claims
1. A method for manufacturing a liquid crystal display, comprising: forming a thin film transistor on a substrate; forming a pixel electrode connected to the thin film transistor; forming a sacrificial layer with an open portion on the pixel electrode; forming a first color filter on the sacrificial layer; forming a second color filter on the sacrificial layer; forming a third color filter on the sacrificial layer; removing the sacrificial layer to form a plurality of microcavities; injecting a liquid crystal material into the microcavities; forming a capping layer to cover a liquid crystal injection hole of the microcavities; and filling the open portion with one color filter among the first color filter, the second color filter, and the third color filter.
2. The method of claim 1, wherein the color filter filling the open portion forms the partition portion, and the partition portion defines the microcavities.
3. The method of claim 2, wherein the partition portion is formed along a direction that the data line connected to the thin film transistor extends.
4. The method of claim 3, wherein the first color filter, the second color filter, and the third color filter are formed of an island shape.
5. The method of claim 4, further comprising forming a lower insulating layer on the sacrificial layer.
6. The method of claim 5, wherein a boundary surface in which color filters neighboring each other among the first color filter, the second color filter, and the third color filter meet each other is disposed on the partition portion.
7. The method of claim 5, wherein a separation space of color filters neighboring each other among the first color filter, the second color filter, and the third color filter is formed on the partition portion, the method further comprising forming an upper insulating layer covering the separation space, and the upper insulating layer includes an inorganic layer.
8. The method of claim 5, wherein the first color filter, the second color filter, and the third color filter respectively form a blue color filter, a red color filter, and a green color filter, and the blue color filter forms the partition portion.
9. The method of claim 2, further comprising forming an organic layer on the first color filter, the second color filter, and the third color filter.
10. The method of claim 9, wherein the first color filter, the second color filter, and the third color filter are formed to be separated from each other on the partition portion.
11. The method of claim 10, wherein the separation space of the first color filter, the second color filter, and the third color filter is filled with the organic layer.
12. The method of claim 11, wherein the first color filter forms the partition portion, and the first color filter is a blue color filter.
13. The method of claim 2, further comprising: forming an upper insulating layer on the first color filter, the second color filter, and the third color filter; and patterning the upper insulating layer to form a liquid crystal injection hole formation region, wherein the liquid crystal injection hole formation region is formed along a direction that a gate line connected to the thin film transistor extends.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION OF THE EMBODIMENTS
(13) Hereinafter, exemplary embodiments will be described in detail with reference to the accompanying drawings. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the inventive concept. On the contrary, exemplary embodiments introduced herein are provided to make disclosed contents thorough and complete and sufficiently transfer the spirit of the inventive concept to those skilled in the art.
(14) In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. It will be understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening them may also be present. Like reference numerals designate like elements throughout the specification.
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(17) Referring to
(18) A gate insulating layer 140 is formed on the gate line 121 and the storage electrode line 131. A semiconductor layer 151 disposed under a data line 171 and a semiconductor layer 154 disposed under a source/drain electrode and corresponding to a channel region of a thin film transistor Q are formed on the gate insulating layer 140.
(19) A plurality of ohmic contacts may be formed between the semiconductor layer 151 and the data line 171, and between the semiconductor layer 154 under the source/drain electrode and corresponding to the channel region and the source/drain electrode, and are omitted in the drawings.
(20) Data conductors 171, 173, and 175 including a source electrode 173, a data line 171 connected to the source electrode 173, and a drain electrode 175 are formed on the semiconductor layers 151 and 154 and the gate insulating layer 140.
(21) The gate electrode 124, the source electrode 173, and the drain electrode 175 form a thin film transistor Q along with the semiconductor layer 154, and the channel of the thin film transistor Q is formed in the exposed portion of the semiconductor layer 154 between the source electrode 173 and the drain electrode 175.
(22) A first interlayer insulating layer 180a is formed on the data conductors 171, 173, and 175 and the exposed semiconductor layer 154. The first interlayer insulating layer 180a may include an inorganic insulator such as a silicon nitride (SiNx) and a silicon oxide (SiOx).
(23) A second interlayer insulating layer 180b and a third interlayer insulating layer 180c may be disposed on the first interlayer insulating layer 180a. The second interlayer insulating layer 180b may be formed of the organic material, and the third interlayer insulating layer 180c may include the inorganic insulator such as the silicon nitride (SiNx) and the silicon oxide (SiOx). The second interlayer insulating layer 180b is formed of the organic material thereby reducing or removing a step. Differently from the present exemplary embodiment, one or two of the first interlayer insulating layer 180a, the second interlayer insulating layer 180b, and the third interlayer insulating layer 180c may be omitted.
(24) A contact hole 185 passing through the first interlayer insulating layer 180a, the second interlayer insulating layer 180b, and the third interlayer insulating layer 180c may be formed. The pixel electrode 191 disposed on the third interlayer insulating layer 180c may be electrically and physically connected to the drain electrode 175 through the contact hole 185. Hereafter, the pixel electrode 191 will be described in detail.
(25) The pixel electrode 191 may be made of a transparent conductive material such as ITO or IZO.
(26) An overall shape of the pixel electrode 191 is a quadrangle, and the pixel electrode 191 includes cross stems configured by a horizontal stem 191a and a vertical stem 191b crossing the horizontal stem 191a. Further, the pixel electrode 191 is divided into four sub-regions by the horizontal stem 191a and the vertical stem 191b, and each sub-region includes a plurality of minute branches 191c. In the present exemplary embodiment, the pixel electrode 191 may further include an outer stem 191d connecting the minute branches 191c at a right and left outer circumference of the pixel electrode 191. In the present exemplary embodiment, the outer stem 191d is disposed at the right and left exterior of the pixel electrode 191, however it may be disposed to extend to an upper portion or a lower portion of the pixel electrode 191.
(27) The minute branches 191c of the pixel electrode 191 form an angle of approximately 40° to 45° with the gate line 121 or the horizontal stem 191a. Further, the minute branches 191c of two adjacent sub-regions may be perpendicular to each other. In addition, a width of each minute branch 191c may be gradually increased, or a distance between the minute branches 191c may be varied.
(28) The pixel electrode 191 includes an extension 197 which is connected at a lower end of the vertical stem 191b, has a larger area than the vertical stem 191b, and is electrically and physically connected to the drain electrode 175 through the contact hole 185 at the extension 197, thereby receiving the data voltage from the drain electrode 175.
(29) The thin film transistor Q and the pixel electrode 191 described above are just described as examples, and a structure of the thin film transistor and a design of the pixel electrode may be modified in order to improve side visibility.
(30) A light blocking member 220 to cover a region where the thin film transistor Q is formed is disposed on the pixel electrode 191. The light blocking member 220 according to the present exemplary embodiment may be formed along a direction that the gate line 121 extends. The light blocking member 220 may be formed of a material that blocks light.
(31) An insulating layer 181 may be formed on the light blocking member 220, and the insulating layer 181 covering the light blocking member 220 may extend on the pixel electrode 191.
(32) A lower alignment layer 11 is formed on the pixel electrode 191, and may be a vertical alignment layer. The lower alignment layer 11, as a liquid crystal alignment layer made of a material such as polyamic acid, a polysiloxane, a polyimide, or the like, may include at least one of generally used materials. Also, the lower alignment layer 11 may be a photoalignment layer.
(33) An upper alignment layer 21 is provided at a portion facing the lower alignment layer 11, and a microcavity 305 is formed between the lower alignment layer 11 and the upper alignment layer 21. A liquid crystal material including liquid crystal molecules 310 is injected into the microcavity 305, and the microcavity 305 has a liquid crystal injection hole 307. The microcavities 305 may be formed along a column direction of the pixel electrode 191, that is, in the vertical direction. In the present exemplary embodiment, the alignment material forming the alignment layers 11 and 21 and the liquid crystal material including the liquid crystal molecules 310 may be injected into the microcavity 305 by using capillary force.
(34) The microcavities 305 are divided in the vertical direction by a plurality of liquid crystal injection hole formation regions 307FP disposed at a portion overlapping the gate line 121, thereby defining the plurality of microcavities 305, and the plurality of microcavities 305 may be formed along a column direction of the pixel electrode 191, that is, in the vertical direction. Also, the microcavities 305 are divided in the horizontal direction by a partition portion PWP that will be described later, thereby defining the plurality of microcavities 305, and the plurality of microcavities 305 may be formed along the row direction of the pixel electrode 191, in other words, the horizontal direction in which the gate line 121 extends. The plurality of formed microcavities 305 may respectively correspond to the pixel area, and the pixel areas may correspond to a region displaying the image.
(35) A common electrode 270 and a lower insulating layer 350 are disposed on the upper alignment layer 21. The common electrode 270 receives the common voltage, and generates an electric field together with the pixel electrode 191 to which the data voltage is applied to determine a direction in which the liquid crystal molecules 310 disposed at the microcavity 305 between the two electrodes 270, 191 are inclined. The common electrode 270 forms a capacitor with the pixel electrode 191 to maintain the received voltage even after the thin film transistor Q is turned off. The lower insulating layer 350 may be formed of a silicon nitride (SiNx) or a silicon oxide (SiOx).
(36) In the present exemplary embodiment, it is described that the common electrode 270 is formed on the microcavity 305, but in another exemplary embodiment, the common electrode 270 is formed under the microcavity 305, so that liquid crystal driving according to a coplanar electrode (CE) mode is possible.
(37) In the present exemplary embodiment, a color filter 230 is disposed on the lower insulating layer 350. As shown in
(38) The color filters 230 neighboring each other on the partition portion PWP may overlap. The boundary surface where the neighboring color filters 230 meet each other may be disposed at the portion corresponding to the partition portion PWP.
(39) In the present exemplary embodiment, the color filter 230 and the partition portion PWP function as a roof layer supporting the microcavity 305 to maintain the shape thereof.
(40) Hereafter, the color filter 230 according to an exemplary embodiment will be described with reference to
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(42) Referring to
(43) According to the present exemplary embodiment, the partition portion PWP is formed by any one among the first color filter, the second color filter, and the third color filter. In an exemplary embodiment, the first color filter corresponding to the blue color filter B forms the partition portion PWP. The blue color filter B may include the partition portion PWP extended from the portion corresponding to the pixel area PX and the partition portion PWP disposed between the red color filter R and the green color filter G. In this case, the red color filter R and the green color filter G covering edges opposite to each other in the partition portions PWP are simultaneously adjacent to each other, and may overlap on the partition portion PWP.
(44) Instead of the blue color filter B, it is possible to form the partition portion PWP made of the red color filter R or the green color filter G. However, the blue color filter B has a larger blocking effect compared with the red color filter R or the green color filter G such that there is a merit of reducing a reflection of the light if the partition portion PWP is formed of the blue color filter B. Also, the blue color filter B has excellent fluidity of a photoresist of the color filter as well as the light blocking effect, thereby obtaining a good taper angle. Accordingly, compared with a case that an end shape of the color filter forming the partition portion PWP is vertical, the end of the color filter is slanted with an angle of more than about 45 degrees, so the color filter coated on the partition portion PWP while covering the side wall of the partition portion PWP may be well formed.
(45) As shown in
(46) Again referring to
(47) A capping layer 390 is disposed on the upper insulating layer 370. The capping layer 390 is also disposed at the liquid crystal injection hole formation region 307FP and the liquid crystal injection hole 307 of the microcavity 305 exposed by the liquid crystal injection hole formation region 307FP. The capping layer 390 includes the organic material or the inorganic material. In the present exemplary embodiment, the liquid crystal material is removed in the liquid crystal injection hole formation region 307FP. But, in a modified exemplary embodiment, the liquid crystal material may remain at the liquid crystal injection hole formation region 307FP after being injected to the microcavity 305.
(48) In the present exemplary embodiment, as shown in
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(50) Referring to
(51) However, it is not limited to this exemplary embodiment, and the partition portion PWP disposed between the blue color filter B and the red color filter R may be formed by extending the red color filter R, or the partition portion PWP disposed between the red color filter R and the green color filter G may be formed by extending the green color filter G.
(52) The description of
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(54) Referring to
(55) The description of
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(57) Referring to
(58) The description of
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(60) Referring to
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(62) The exemplary embodiment described in
(63) If sizes of the first connection B-1, the second connection R-1, and the third connection G-1 are increased, the area of the liquid crystal injection hole formation region 307FP may be reduced. Accordingly, the size and the position of the connections B-1, R-1, and G-1 may be adjusted such that the alignment material and the liquid crystal material are freely injected into the microcavity 305 through the liquid crystal injection hole 307.
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(65) The exemplary embodiment described in
(66) A manufacturing method of a liquid crystal display according to an exemplary embodiment will now be described with reference to
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(68) Referring to
(69) The first interlayer insulating layer 180a is formed on the data conductors 171, 173, and 175 including the source electrode 173, the drain electrode 175, and the data line 171, and the exposed portion of the semiconductor layer 154.
(70) The second interlayer insulating layer 180b and the third interlayer insulating layer 180c are formed on the first interlayer insulating layer 180a and the contact hole 185 passing through them is formed. Next, the pixel electrode 191 is formed on the third interlayer insulating layer 180c, and the pixel electrode 191 may be electrically and physically connected to the drain electrode 175 through the contact hole 185.
(71) The light blocking member 220 is formed on the pixel electrode 191 or the third interlayer insulating layer 180c. The light blocking member 220 may be formed according to the direction that the gate line 121 extends. The light blocking member 220 may be formed of the material blocking the light. The insulating layer 181 is formed on the light blocking member 220 and the insulating layer 181 may be extended on the pixel electrode 191 while covering the light blocking member 220.
(72) Next, a sacrificial layer 300 is formed on the pixel electrode 191. In this case, an open portion OPN is formed along the direction parallel to the data line 171 in the sacrificial layer 300. In the open portion OPN, the color filter 230 may be filled in a following process thereby forming the partition portion PWP. The sacrificial layer 300 may be formed of a photoresist or the organic material.
(73) Referring to
(74) Referring to
(75) Hereafter, the manufacturing process of the color filter 230 according to an exemplary embodiment will be described with reference to
(76) Referring to
(77) Referring to
(78) Referring to
(79) The formation position and the sequence of the above-described red color filter R and green color filter G may be changed. Also, differently from that shown in
(80) Next, referring to
(81) Referring to
(82) Referring to
(83) Referring to
(84) Next, a liquid crystal material including the liquid crystal molecules 310 is injected into the microcavity 305 via the liquid crystal injection hole 307, using an inkjet method and the like.
(85) Thereafter, the capping layer 390 is formed on the insulating layer 350 to cover the liquid crystal injection hole 307 and the liquid crystal injection hole formation region 307FP to form the liquid crystal display illustrated in
(86) While the inventive concept has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the inventive concept is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
(87) TABLE-US-00001 <Description of Symbols> 230 color filter 300 sacrificial layer 305 microcavity 307 liquid crystal injection hole 350 lower insulating layer 370 upper insulating layer 390 capping layer