SELECTIVE DEPOSITION WITH SURFACE TREATMENT
20170342553 · 2017-11-30
Inventors
- Kai-Hung Yu (Watervliet, NY, US)
- Kandabara N. Tapily (Mechanicville, NY, US)
- Takahiro Hakamata (Albany, NY, US)
- Subhadeep Kal (Albany, NY, US)
- Gerrit J. Leusink (Rexford, NY, US)
Cpc classification
H01L21/76849
ELECTRICITY
B01D53/76
PERFORMING OPERATIONS; TRANSPORTING
C23C16/04
CHEMISTRY; METALLURGY
H01L21/76826
ELECTRICITY
H01L21/31
ELECTRICITY
International classification
C23C16/455
CHEMISTRY; METALLURGY
H01L21/31
ELECTRICITY
Abstract
Embodiments of the invention provide methods for selective deposition on different materials using a surface treatment. According to one embodiment, the method includes providing a substrate containing a first material layer having a first surface and a second material layer having a second surface, and performing a chemical oxide removal process that terminates that second surface with hydroxyl groups. The method further includes modifying the second surface by exposure to a process gas containing a hydrophobic functional group, the modifying substituting the hydroxyl groups on the second surface with the hydrophobic functional group, and selectively depositing a metal-containing layer on the first surface but not on the modified second surface by exposing the substrate to a deposition gas.
Claims
1. A method of processing a substrate, comprising: providing a substrate containing a first material layer having a first surface and a second material layer having a second surface; performing a chemical oxide removal process that terminates that second surface with hydroxyl groups; modifying the second surface by exposure to a process gas containing a hydrophobic functional group, the modifying substituting the hydroxyl groups on the second surface with the hydrophobic functional group; and selectively depositing a metal-containing layer on the first surface but not on the modified second surface by exposing the substrate to a deposition gas.
2. The method of claim 1, wherein the first material layer includes a silicon layer and the second material layer includes a dielectric layer.
3. The method of claim 2, wherein the performing removes an oxide layer from the silicon layer and the dielectric layer.
4. The method of claim 2, wherein the dielectric layer includes one or more of SiO, SiN, SiOH, SiCOH, a high-k material, or a low-k material.
5. The method of claim 1, wherein the first material layer includes an initial metal-containing layer and the second material layer includes a dielectric layer.
6. The method of claim 5, wherein the performing removes an oxide layer from the initial metal-containing layer and the dielectric layer.
7. The method of claim 5, wherein the dielectric layer includes one or more of SiO, SiN, SiOH, SiCOH, a high-k material, or a low-k material.
8. The method of claim 5, wherein the initial metal-containing layer includes a metal layer or a metal-compound layer containing Cu, Al, Ta, TaN, Ti, TiN, W, TiW, Ru, Co, Mo, W, Pt, Ir, Rh, or Re, or a combination thereof.
9. The method of claim 1, wherein the first material layer includes an initial metal-containing layer and the second material layer includes a silicon layer.
10. The method of claim 9, wherein the performing removes an oxide layer from the initial metal-containing layer and the silicon layer.
11. The method of claim 9, wherein the oxide layer includes a native oxide layer or a chemical oxide layer that is deposited on the substrate.
12. The method of claim 9, wherein the initial metal-containing layer includes a metal layer or a metal-compound layer containing Cu, Al, Ta, TaN, Ti, TiN, W, TiW, Ru, Co, Mo, W, Pt, Ir, Rh, or Re, or a combination thereof.
13. The method of claim 1, wherein the process gas comprises a silicon-containing gas selected from an alkyl silane, an alkoxysilane, an alkyl alkoxysilane, an alkyl siloxane, an alkoxysiloxane, an alkyl alkoxysiloxane, an aryl silane, an acyl silane, an aryl siloxane, an acyl siloxane, a silazane, or any combination thereof.
14. The method of claim 1, wherein the metal-containing layer includes a metal layer or a metal-compound layer.
15. The method of claim 14, wherein the metal layer and the metal-compound layer contain Al, Ta, TaN, Ti, TiN, W, TiW, Ru, Co, Mo, W, Pt, Ir, Rh, or Re, or a combination thereof.
16. The method of claim 1, wherein the chemical oxide removal process includes exposing the substrate to HF and NH.sub.3 gases.
17. A method of processing a substrate, comprising: providing a substrate containing a silicon layer having a first surface and a SiO.sub.x layer having a second surface; performing a chemical oxide removal process that terminates that second surface with hydroxyl groups; modifying the second surface by exposure to a process gas containing a hydrophobic functional group, the modifying substituting the hydroxyl groups on the second surface with the hydrophobic functional group; and selectively depositing a metal layer or a metal-compound layer on the first surface but not on the modified second surface by exposing the substrate to a metal-containing deposition gas.
18. The method of claim 17, wherein the chemical oxide removal process includes exposing the substrate to HF and NH.sub.3 gases.
19. The method of claim 17, wherein the metal layer and the metal-compound layer contain Al, Ta, TaN, Ti, TiN, W, TiW, Ru, Co, Mo, W, Pt, Ir, Rh, or Re, or a combination thereof.
20. The method of claim 17, wherein the chemical oxide removal process removes a native oxide layer from the first surface and enhances subsequent reactivity of the modified second surface with the process gas.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0006] A more complete appreciation of embodiments of the invention and many of the attendant advantages thereof will become readily apparent with reference to the following detailed description, particularly when considered in conjunction with the accompanying drawings, in which:
[0007]
[0008]
[0009]
[0010]
DETAILED DESCRIPTION OF SEVERAL EMBODIMENTS
[0011] Embodiments of the invention provide methods for selective deposition on different materials using a surface treatment and a subsequent deposition process. Selective deposition may be achieved by surface treatment that results in increased incubation times on surfaces of materials where deposition is not desired, while providing fast and effective deposition on other materials. This improved deposition selectivity provides a greater margin for line-to-line breakdown and electrical leakage performance in the semiconductor device containing the material layer. Embodiments of the invention greatly benefit surface sensitive gas phase deposition processes such as atomic layer deposition (ALD) and chemical vapor deposition (CVD), and variants thereof, as well as spin-on deposition.
[0012] According to one embodiment of the invention, the method includes providing a substrate containing a first material layer having a first surface and a second material layer having a second surface, and performing a chemical oxide removal (COR) process that terminates that second surface with hydroxyl groups. The method further includes modifying the second surface by exposure to a process gas containing a hydrophobic functional group, the modifying substituting the hydroxyl groups on the second surface with the hydrophobic functional group, and selectively depositing a metal-containing layer on the first surface but not on the modified second surface by exposing the substrate to a deposition gas. The COR process can include a dry etching process or a wet etching process. The dry etching process can, for example, be HF-based. The inventors have discovered that the COR process greatly enhances the subsequent surface modification of surfaces of dielectric materials, resulting in excellent blocking of subsequent deposition on the modified dielectric surfaces. In some examples, the modifying can include processes such as low-k restoration (LKR) or formation of self-assembled monolayers (SAM) on the substrate.
[0013]
[0014] The substrate further contains a native oxide layer 106 on the Si layer 104 and on the SiO.sub.x layer 102. The native oxide layer 106 may form by atmospheric exposure that oxidizes the substrate. Alternatively, the native oxide layer 106 may include a chemical oxide layer that is deposited on the substrate. According to other embodiments, the SiO.sub.x layer 102 may further include or be replaced by one or more of SiN, SiOH, SiCOH, a high-k material, and a low-k material.
[0015] Interconnect delay is a major limiting factor in the drive to improve the speed and performance of integrated circuits (ICs). One way to minimize interconnect delay is to reduce interconnect capacitance by using low-k materials during production of the ICs. Such low-k materials have also proven useful for low temperature processing. Thus, in recent years, low-k materials have been developed to replace relatively high dielectric constant insulating materials, such as SiO.sub.2 (k˜4).
[0016] In particular, low-k films are being utilized for inter-level and intra-level dielectric layers between metal layers of semiconductor devices. Additionally, in order to further reduce the dielectric constant of insulating materials, material films are formed with pores, i.e., porous low-k materials. Such low-k materials can be deposited by a spin-on dielectric (SOD) method similar to the application of photo-resist, or by CVD.
[0017] Low-k materials may have a dielectric constant of less than 3.7, or a dielectric constant ranging from 1.6 to 3.7. Low-k materials can include fluorinated silicon glass (FSG), carbon doped oxide, a polymer, a SiCOH-containing low-k material, a non-porous low-k material, a porous low-k material, a spin-on dielectric (SOD) low-k material, or any other suitable dielectric material. The low-k material can include BLACK DIAMOND® (BD) or BLACK DIAMOND® II (BDII) SiCOH material, commercially available from Applied Materials, Inc., or Coral® CVD films commercially available from Novellus Systems, Inc. Other commercially available carbon-containing materials include SILK® (e.g., SiLK-I, SiLK-J, SiLK-H, SiLK-D, and porous SiLK semiconductor dielectric resins) and CYCLOTENE® (benzocyclobutene) available from Dow Chemical, and GX-3TM, and GX-3PTM semiconductor dielectric resins available from Honeywell.
[0018] Low-k materials include porous inorganic-organic hybrid films comprised of a single-phase, such as a silicon oxide-based matrix having CH.sub.3 bonds that hinder full densification of the film during a curing or deposition process to create small voids (or pores). Still alternatively, these dielectric materials may include porous inorganic-organic hybrid films comprised of at least two phases, such as a carbon-doped silicon oxide-based matrix having pores of organic material (e.g., porogen) that is decomposed and evaporated during a curing process.
[0019] In addition, low-k materials include silicate-based materials, such as hydrogen silsesquioxane (HSQ) or methyl silsesquioxane (MSQ), deposited using SOD techniques. Examples of such films include FOOD HSQ commercially available from Dow Corning, XLK porous HSQ commercially available from Dow Corning, and JSR LKD-5109 commercially available from JSR Microelectronics.
[0020] High-k materials can contain one or more metal elements selected from alkaline earth elements, rare earth elements, Group IIIA, Group IVA, and Group IVB elements of the Periodic Table of the Elements. Alkaline earth metal elements include beryllium (Be), magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba). Exemplary oxides include magnesium oxide, calcium oxide, and barium oxide, and combinations thereof. Rare earth metal elements may be selected from the group of scandium (Sc), yttrium (Y), lutetium (Lu), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb). The Group IVB elements include titanium (Ti), hafnium (Hf), and zirconium (Zr). According to some embodiments of the invention, the high-k material may contain HfO.sub.2, HfON, HfSiON, ZrO.sub.2, ZrON, ZrSiON, TiO.sub.2, TiON, Al.sub.2O.sub.3, La.sub.2O.sub.3, W.sub.2O.sub.3, CeO.sub.2, Y.sub.2O.sub.3, or Ta.sub.2O.sub.5, or a combination of two or more thereof. However, other dielectric materials are contemplated and may be used.
[0021]
[0022] The dry etching process may be carried out in a processing system containing a COR module for chemically altering exposed surface layers on the substrate, a post heat treatment (PHT) module for thermally treating the chemically altered surface layers on the substrate, and an isolation assembly coupled between the PHT module and the COR module. In one example, the substrate may be exposed to a process gas containing HF and NH.sub.3 in the COR module where the processing pressure can range from about 1 mTorr to about 100 mTorr and can, for example, range from about 2 mTorr to about 25 mTorr. The process gas flow rates can range from about 1 to about 200 sccm for each species and can, for example, range from about 10 sccm to about 100 sccm. Additionally, the COR module can be heated to a temperature ranging from 30° C. to 100° C. and, for example, the temperature can be about 40° C. Additionally, a gas distribution system for delivering the process gas to the COR module can be heated to a temperature ranging from about 40° to about 100° C. and, for example, the temperature can be about 50° C. The substrate can be maintained at a temperature ranging from about 10° C. to about 50° and, for example, the substrate temperature can be about 20° C.
[0023] In addition, in the PHT module, the thermal treatment chamber can be heated to a temperature ranging from about 50° C. to about 100° C. and, for example, the temperature can be about 80° C. In one example, the substrate can be heated to a temperature in excess of about 100° C. Alternatively, the substrate can be heated in a range from about 100° C. to about 200° C., and, for example, the temperature can be about 135° C.
[0024] In another example, a mixture of ozone and H.sub.2O vapor may be used in the dry etching process. In still another example, peroxide vapor may be used.
[0025] According to other embodiments, the chemical oxide removal can include a wet etching process. The wet etching process can, for example, utilize industry standard SC1 and SC2 solutions.
[0026] Following the chemical oxide removal process, the substrate may be subjected to a surface modification process that can include low-k restoration (LKR) or self-assembled monolayers (SAM). The surface modification process can include exposing the substrate in
[0027] In some examples, the process gas containing a hydrophilic functional group can include a silicon-containing gas, including an alkyl silane, an alkoxysilane, an alkyl alkoxysilane, an alkyl siloxane, an alkoxysiloxane, an alkyl alkoxysiloxane, an aryl silane, an acyl silane, an aryl siloxane, an acyl siloxane, a silazane, or any combination thereof. According to some embodiments, the process gas may be selected from dimethylsilane dimethylamine (DMSDMA), trimethylsilane dimethylamine (TMSDMA), bis(dimethylamino) dimethylsilane (BDMADMS), and other alkyl amine silanes. According to other embodiments, the process gas may be selected from N,O-bistrimethylsilyltrifluoroacetamide (BSTFA) and trimethylsilyl-pyrrole (TMS-pyrrole).
[0028] According to some embodiments of the invention, the process gas may be selected from silazane compounds. Silazanes are saturated silicon-nitrogen hydrides. They are analogous in structure to siloxanes with —NH— replacing —O—. An organic silazane precursor can further contain at least one alkyl group bonded to the Si atom(s). The alkyl group can, for example, be a methyl group, an ethyl group, a propyl group, or a butyl group, or combinations thereof. Furthermore, the alkyl group can be a cyclic hydrocarbon group such as a phenyl group. In addition, the alkyl group can be a vinyl group. Disilazanes are compounds having from 1 to 6 methyl groups attached to the silicon atoms or having 1 to 6 ethyl groups attached the silicon atoms, or a disilazane molecule having a combination of methyl and ethyl groups attached to the silicon atoms.
[0029] The structure of hexamethyldisilazane (HMDS) is shown below.
##STR00001##
[0030] HMDS contains a Si—N—Si structural unit and three methyl groups bonded to each Si atom. HMDS is a commercially available silicon compound with a vapor pressure of about 20 Torr at 20° C.
[0031] Examples of organic silazane compounds are shown in TABLE 1.
TABLE-US-00001 TABLE 1 Triethylsilazane SiC.sub.6H.sub.17N Tripropylsilazane SiC.sub.9H.sub.23N Triphenylsilazane SiC.sub.18H.sub.17N Tetramethyldisilazane Si.sub.2C.sub.4H.sub.15N Hexamethyldisilazane Si.sub.2C.sub.6H.sub.19N Hexaethyldisilazane Si.sub.2C.sub.12H.sub.31N Hexaphenyldisilazane Si.sub.2C.sub.36H.sub.31N Heptamethyldisilazane Si.sub.2C.sub.7H.sub.21N Dipropyl-tetramethyldisilazane Si.sub.2C.sub.10H.sub.27N Di-n-Butyl-tetramethyldisilazane Si.sub.2C.sub.12H.sub.31N Di-n-Octyl-tetramethyldisilazane Si.sub.2C.sub.20H.sub.47N Triethyl-trimethylcyclotrisilazane Si.sub.2C.sub.9H.sub.27N.sub.3 Hexamethylcyclotrisilazane Si.sub.3C.sub.6H.sub.21N.sub.3 Hexaethylcyclotrisilazane Si.sub.3C.sub.12H.sub.33N.sub.3 Hexaphenylcyclotrisilazane Si.sub.3C.sub.36H.sub.33N.sub.3 Octamethylcyclotetrasilazane Si.sub.4C.sub.8H.sub.28N.sub.4 Octaethylcyclotetrasilazane Si.sub.4C.sub.16H.sub.44N.sub.4 Tetraethyl-tetramethylcyclotetrasilazane Si.sub.4C.sub.12H.sub.36N.sub.4 Cyanopropylmethylsilazane SiC.sub.5H.sub.10N.sub.2 Tetraphenyldimethyldisilazane Si.sub.2C.sub.26H.sub.27N Diphenyl-tetramethyldisilazane Si.sub.2C.sub.16H.sub.23N Trivinyl-trimethylcyclotrisilazane Si.sub.3C.sub.9H.sub.21N.sub.3 Tetravinyl-tetramethylcyclotetrasilazane Si.sub.4C.sub.12H.sub.28N.sub.4 Divinyl-tetramethyldisilazane Si.sub.2C.sub.8H.sub.19N
[0032] Following the surface modification process, the substrate in
[0033] The metal-containing precursor vapor may contain a wide variety of Ta—, Ti—, or W-containing precursors, Examples of Ta-containing precursors containing “Ta-N” intra-molecular bonds include Ta(NEt.sub.2).sub.5 (PDEAT), Ta(NMe.sub.2).sub.5 (PDMAT), Ta(NEtMe).sub.5 (PEMAT), Ta(NMe.sub.2).sub.3(NCMe.sub.2Et) (TAIMATA), (tBuN)Ta(NMe.sub.2).sub.3 (TBTDMT), (tBuN)Ta(NEt.sub.2).sub.3 (TBTDET), (tBuN)Ta(NEtMe).sub.3 (TBTEMT), and (iPrN)Ta(NEt.sub.2).sub.3 (IPTDET). Other examples of Ta-containing precursors contain “Ta—C” intra-molecular bonds, for example Ta(η.sup.5—C.sub.5H.sub.5).sub.2H.sub.3, Ta(CH.sub.2)(CH.sub.3)(η.sup.5—C.sub.5H.sub.5).sub.2, Ta(η.sup.3—C.sub.3H.sub.5) (η.sup.5—C.sub.5H.sub.5).sub.2, Ta(CH.sub.3).sub.3(η.sup.5—C.sub.5H.sub.5).sub.2, Ta(CH.sub.3).sub.4(η.sup.5—C.sub.5(CH.sub.3).sub.5), or Ta(η.sup.5—C.sub.5(CH.sub.3).sub.5).sub.2H.sub.3. Other Ta-containing precursors contain “Ta—O” intra-molecular bonds, for example Ta.sub.2(OEt).sub.10 and (Me.sub.2NCH.sub.2CH.sub.2O)Ta(OEt).sub.4. TaCl.sub.5 and TaF.sub.5 are examples of tantalum halide precursors containing “Ta-halogen” bonds.
[0034] Representative examples of Ti-containing precursors having “Ti—N” intra-molecular bonds include Ti(NEt.sub.2).sub.4 (TDEAT), Ti(NMeEt).sub.4 (TEMAT), Ti(NMe.sub.2).sub.4 (TDMAT). Representative examples of Ti-containing precursors containing “Ti—C” intra-molecular bonds include Ti(COCH.sub.3)(η.sup.5—C.sub.5H.sub.5).sub.2Cl, Ti(η.sup.5—C.sub.5H.sub.5)Cl.sub.2, Ti(η.sup.5—C.sub.5H.sub.5)Cl.sub.3, Ti(η.sup.5—C.sub.5H.sub.5).sub.2Cl.sub.2, Ti(η.sup.5—C.sub.5(CH.sub.3).sub.5)Cl.sub.3, Ti(CH.sub.3)(η.sup.5—C.sub.5H.sub.5).sub.2Cl, Ti(η.sup.5—C.sub.9H.sub.7).sub.2Cl.sub.2, Ti((η.sup.5—C.sub.5(CH.sub.3).sub.5).sub.2Cl, Ti((η.sup.5—C.sub.5(CH.sub.3).sub.5).sub.2Cl.sub.2, Ti(η.sup.5—C.sub.5H.sub.5).sub.2(μ—Cl).sub.2, Ti(η.sup.5—C.sub.5H.sub.5).sub.2(CO).sub.2, Ti(CH.sub.3).sub.3(η.sup.5—C.sub.5H.sub.5), Ti(CH.sub.3).sub.2(η.sup.5—C.sub.5H.sub.5).sub.2, Ti(CH.sub.3).sub.4, Ti(η.sup.5—C.sub.5H.sub.5(η.sup.7—C.sub.7H.sub.7), Ti(η.sup.5—C.sub.5H.sub.5(η.sup.8—C.sub.8H.sub.8), Ti(C.sub.5H.sub.5).sub.2(η.sup.5—C.sub.5H.sub.5).sub.2, Ti((C.sub.5H.sub.5).sub.2).sub.2(η—H).sub.2, Ti(η.sup.5—C.sub.5(CH.sub.3).sub.5).sub.2, Ti(η.sup.5—C.sub.5(CH.sub.3).sub.5).sub.2(H).sub.2, and Ti(CH.sub.3).sub.2(η.sup.5—C.sub.5(CH.sub.3).sub.5).sub.2. TiCl.sub.4is an example of a titanium halide precursor containing a “Ti-halogen” bond.
[0035] Representative examples of tungsten-containing (W-containing) precursors include W(CO).sub.6, which contains a “W—C” intra-molecular bond, and WF.sub.6, which contains a “W-halogen” intra-molecular bond.
[0036] The metal-containing precursor vapor can contain a metal-containing precursor that may be selected from ruthenium (Ru)-containing precursors, cobalt (Co)-containing precursors, molybdenum (Mo)-containing precursors, tungsten (W)-containing precursors, platinum (Pt)-containing precursors, iridium (Ir)-containing precursors, rhodium (Rh)-containing precursors, and rhenium (Re)-containing precursors. Exemplary Ru-containing precursors include Ru.sub.3(CO).sub.12, (2,4-dimethylpentadienyl) (ethylcyclopentadienyl) ruthenium (Ru(DMPD)(EtCp)), bis(2,4-dimethylpentadienyl) ruthenium (Ru(DMPD).sub.2), 4-dimethylpentadienyl) (methylcyclopentadienyl) ruthenium (Ru(DMPD)(MeCp)), or bis(ethylcyclopentadienyl) ruthenium (Ru(EtCp).sub.2). Exemplary Co precursors include Co.sub.2(CO).sub.8, Co.sub.4(CO).sub.12, CoCp(CO).sub.2, Co(CO).sub.3(NO), Co.sub.2(CO).sub.6(HCC.sup.tBu), Co(acac).sub.2, Co(Cp).sub.2, Co(Me.sub.5Cp).sub.2), Co(EtCp).sub.2, cobalt(II) hexafluoroacetylacetonate hydrate, cobalt tris(2,2,6,6-tetramethyl-3,5-heptanedionate), cobalt(III) acetylacetonate, bis(N,N′-diisopropylacetamidinato) cobalt, and tricarbonyl allyl cobalt. One exemplary Mo precursor is Mo(CO).sub.6. Exemplary W precursors include W(CO).sub.6 and tungsten halides (WX.sub.6, where X is a halogen). Exemplary Pt precursors include Pt(CO).sub.2Cl.sub.2, Pt(acac).sub.2, Me.sub.2PtC.sub.5H.sub.5, Pt(PF.sub.3).sub.4, and MeCpPtMe.sub.3. Exemplary Ir precursors include Ir.sub.4(CO).sub.12, Ir(allyl).sub.3, (methylcyclopentadienyl)(1,5-cyclooctadiene) iridium(I), (C.sub.6H.sub.7)(C.sub.8H.sub.12)Ir, and IrCl.sub.3. Exemplary Rh precursors include Rh(acac)(CO).sub.2, (η.sup.5—C.sub.5H.sub.5)Rh(H.sub.2C═CH.sub.2).sub.2, (η.sup.5—C.sub.5H.sub.5)Rh(CO).sub.2, and RhCl.sub.3. One exemplary Re precursor is Re.sub.2(CO).sub.10. It will be appreciated by those skilled in the art that a number of other metal-containing precursors may be used in embodiments of the present invention.
[0037]
[0038]
[0039] Following the chemical oxide removal process, the substrate may be subjected to a surface modification process that can include low-k restoration (LKR) or self-assembled monolayers (SAM). The surface modification process can include exposing the substrate in
[0040] Thereafter, the substrate in
[0041]
[0042]
[0043] Following the chemical oxide removal process, the substrate may be subjected to a surface modification process that can include low-k restoration (LKR) or self-assembled monolayers (SAM). The surface modification process can include exposing the substrate in
[0044] Thereafter, the substrate in
[0045]
[0046] In other examples, a TaN layer and a TiN layer were selectively deposited on a Si according to an embodiment of the invention. The substrates contained raised Si features and a SiO.sub.2 layer filling the recessed features between the raised Si features. The as-received substrates further contained a native oxide layer on the Si features and on the SiO.sub.2 layer. The substrates were subjected to a chemical oxide removal, and thereafter to a surface modification process of the SiO.sub.2 layer. Thereafter, a TaN layer was deposited using alternating gas exposures of TBTEMT and NH.sub.3. Similarly, a TiN layer was deposited using alternating gas exposures of TEMAT and NH.sub.3. Scanning electron microscopy, BSE, and transmission electron microscopy (TEM) was used to verify the selective TaN and TiN deposition on the raised Si features.
[0047] A method for selective deposition on different materials using a surface treatment has been disclosed in various embodiments. The foregoing description of the embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. This description and the claims following include terms that are used for descriptive purposes only and are not to be construed as limiting. Persons skilled in the relevant art can appreciate that many modifications and variations are possible in light of the above teaching. Persons skilled in the art will recognize various equivalent combinations and substitutions for various components shown in the Figures. It is therefore intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.