Semiconductor component and method for singulating a semiconductor component having a pn junction

Abstract

A a semiconductor component (1a, 1b) having a front side and an opposite rear side and also side surfaces, and also at least one emitter (2a, 2b) and at least one base (3a, 3b), wherein a pn junction (4a, 4b) is formed between emitter (2a, 2b) and base (3a, 3b) and the emitter (2a, 2b) extends parallel to the front and/or rear side. At least one side surface is a passivated separating surface (T), at which a separating surface passivation layer (6a, 6b) is arranged, which has stationary charges having a surface charge density at the separating surface (T) with a magnitude of greater than or equal to 10.sup.12 cm-2. A method for singulating a semiconductor component (1a, 1b) having a pn junction is also provided.

Claims

1. A method for singulating a semiconductor component (1a, 1b) having a pn junction (4a, 4b), comprising the method steps of: A. providing a semiconductor component (1a, 1b) comprising at least one emitter (2a, 2b) and at least one base (3a, 3b), wherein a pn junction (4a, 4b) is formed between the at least one emitter (2a, 2b) and the at least one base (3a, 3b), B. singulating the semiconductor component (1a, 1b) by separation into at least two partial elements at at least one separating surface (T), following method step B, arranging a separating surface passivation layer (6a, 6b) at the separating surface (T) that is formed with stationary charges with a surface charge density, an absolute value of which is greater than or equal to 10.sup.12 cm.sup.−2, wherein in process step B the separation takes place such that the pn junction (4a, 4b) borders the at least one separation surface (T), prior to process step B, applying a passivating layer to at least one of a front side or a rear side of the semiconductor component (1a, 1b), prior to process step B, applying one or more metallic contacting structures to at least one of the front side or the rear side of the semiconductor component (1a, 1b), and wherein the separation surface is parallel to an edge of the silicon wafer.

2. The method as claimed in claim 1, further comprising forming the separating surface passivation layer (6a, 6b) to cover the entire separating surface (T).

3. The method as claimed in claim 1, further comprising, in method step B, implementing the singulation by thermal laser separation (TLS, LIC or LDC).

4. The method as claimed in claim 1, further comprising carrying out a temperature treatment of the separating surface passivation layer (6a, 6b) following the application of the separating surface passivation layer (6a, 6b).

5. The method as claimed in claim 4, wherein the temperature treatment is implemented by successive local heating.

6. The method as claimed in claim 4, wherein the temperature treatment is carried out in a hydrogen-containing atmosphere.

7. The method as claimed in claim 1, wherein the separating surface passivation layer is additionally applied to at least one of the front side or the rear side of the semiconductor component.

8. The method as claimed in claim 1, wherein the semiconductor component (1a, 1b) is formed as a photovoltaic solar cell.

9. The method as claimed in claim 4, wherein the temperature treatment comprises heating the separating surface passivation layer (6a, 6b) to a temperature greater than or equal to 150° C. for a period of at least 1 min.

10. The method as claimed in claim 8, wherein at least the base (3a, 3b) is formed in a silicon layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Further advantageous features and embodiments of the present invention are explained below on the basis of exemplary embodiments and the figures. In detail:

(2) FIGS. 1A and 1B show two exemplary embodiments of semiconductor components according to the invention and partial steps of two exemplary embodiments of methods according to the invention, and

(3) FIG. 2 shows a plan view from above on a semiconductor wafer for elucidating the position of the separating surfaces.

DETAILED DESCRIPTION

(4) The figures show schematic illustrations that are not true to scale. In particular, the widths and thicknesses of the individual layers do not correspond to the actual conditions in order to provide a better representation.

(5) FIGS. 1A and 1B shows two exemplary embodiments A and B, in each case with partial steps of an exemplary embodiment of a method according to the invention. Accordingly, a first exemplary embodiment of a semiconductor component according to the invention is illustrated in FIG. 1A, at iii and a second exemplary embodiment of a semiconductor component according to the invention is illustrated in FIG. 1B, at iii.

(6) Semiconductor components in the form of photovoltaic solar cells are mentioned below as exemplary embodiments. Likewise, the illustrated semiconductor components can be formed as transistors in a modification of the exemplary embodiments.

(7) The first exemplary embodiment of a method according to the invention is explained on the basis of the partial steps illustrated in FIG. 1A:

(8) In a method step A, the semiconductor component 1a is provided. In the present case, it comprises an n-doping type emitter 2a formed from the vapor phase by diffusion and, accordingly, a base 3a, which is doped with a p-doping type dopant. Accordingly, a pn junction 4a is formed between emitter 2a and base 3a. Emitter and base were formed in a silicon wafer. Furthermore, additional components, known per se, of a solar cell were already produced: This comprises passivation layers at the front side, located at the top, and at the back side, located at the bottom, metallization structures at the front side and back side for carrying away charge carriers and antireflection coatings at the front side and possibly back side for increasing the light absorption. In a modification of the exemplary embodiment, the emitter is formed by diffusion from a doping layer applied in advance or by implantation. Likewise, the doping types of emitter and base can be interchanged.

(9) Subsequently, a singulation by separation is implemented at the separating surface T in a method step B by the above-described TLS method. The separating surface T is perpendicular to the plane of the drawing in FIGS. 1A and 1B and consequently passes through the base 3a and emitter 2a.

(10) The TLS method is carried out proceeding from the back side, i.e., first a laser is used to form an initial trench on the back side, located at the bottom, in the region where the separating line T intersects the back side. The initial trench starts at an edge of the semiconductor component. The initial trench does not extend over the entire width of the semiconductor component. Typical initial trenches have a length ranging from 200 μm to 4 mm, typically less than 2 mm. Subsequently, the semiconductor component is separated, as described above, by simultaneous heating and cooling. In a modification of the exemplary embodiment, the TLS method is implemented starting from the front side so that the solar cell need not be rotated during the process.

(11) The result is illustrated in FIG. 1A, at ii: Consequently, two mirror symmetric semiconductor components are produced, which each have a pn junction 4a that borders the separating surface T.

(12) Following method step B, a separating surface passivation layer 6a is formed at the separating surface T. The formation is implemented by chemical vapor deposition (CVD), as is typical in industry, or, in a modification, implemented by atomic layer deposition (ALD).

(13) The separating surface passivation layer 6a consequently extends over the entire separating surface T. The separating surface passivation layer is formed as an aluminum oxide layer with a surface charge density at the interface to the separating surface T with an absolute value of ≥10.sup.12 cm.sup.−2, −3×10.sup.12 cm.sup.−2 in the present case, and has a thickness from a few atomic layers over a few nm up to several 10 nm, 6 nm in the present case.

(14) FIG. 1B shows a second exemplary embodiment of a method according to the invention. To avoid repetition, only the substantial differences are discussed below:

(15) The semiconductor component 1b likewise comprises an emitter 2b and a base 3b such that a pn junction 4b is formed between emitter and base. However, a transverse conduction avoidance region 5b is formed in a method step BO between method steps A and B as described above, i.e., before singulation in particular. As is evident from FIG. 1B, at i, a transverse conduction avoidance region 5b formed as a separating trench is formed by laser ablation and it completely passes through both the emitter 2b and the pn junction 4b. This avoids the transverse conduction of charge carriers through the emitter to the separating surface T and consequently additionally reduces a negative influence, which reduces the electronic quality of the semiconductor component, of the separating surface.

(16) As is evident from FIG. 1B, at 2ii, there subsequently is a separation and hence singulation of the semiconductor component at the separating surface T, in a manner analogous to the first exemplary embodiment. In this exemplary embodiment, the separation is implemented by the above-described LIC method.

(17) As is evident from FIG. 1B, at 3iii, the separating surface passivation layer 6b is subsequently applied. In the present case, the latter is formed as an aluminum oxide layer with a surface charge density at the interface to base and emitter with an absolute value of greater than or equal to 10.sup.12 cm.sup.−2, approximately −3×10.sup.12 cm.sup.−2 in the present case, and has a thickness from a few atomic layers over a few nm up to several 10 nm, 6 nm in the present case. The separating surface passivation layer 6b was produced by ALD. As a result, there is a formation not only at the separating surface T but likewise at the walls of the transverse conduction avoidance region 5b, which is formed as a separating trench.

(18) In order to provide a better representation, FIGS. 1A and 1B only illustrate one separating surface in each case.

(19) When singulating photovoltaic solar cells, for example to form modules in accordance with the shingling technique mentioned at the outset, there usually is a singulation of a plurality of solar cells starting from a silicon wafer.

(20) FIG. 2 illustrates a schematic plan view from above on a silicon wafer, in which photovoltaic solar cells were formed. One of the above-described methods is carried out at a plurality of separating surfaces T, four in the present case, and so five semiconductor components are available following singulation.

LIST OF REFERENCE SIGNS

(21) 1a, 1b Semiconductor component 2a, 2b Emitter 3a, 3b Base 4a, 4b pn junction 5b Transverse conduction avoidance region 6a, 6b Separating surface passivation layer T Separating surface