Abstract
A method for testing a photovoltaic panel connected to an electronic module. The electronic module includes an input attached to the photovoltaic panel and a power output. The method activates a bypass to the electronic module. The bypass provides a low impedance path between the input and the output of the electronic module. A current is injected into the electronic module thereby compensating for the presence of the electronic module during the testing. The current may be previously determined by measuring a circuit parameter of the electronic module. The circuit parameter may be impedance, inductance, resistance or capacitance.
Claims
1. A system comprising: a photovoltaic (PV) panel comprising a PV positive output terminal and a PV negative output terminal; a power converter comprising a positive input terminal, a negative input terminal, a positive output terminal, and a negative output terminal, wherein the PV positive output terminal and the PV negative output terminal are respectively connected to the positive input terminal of the power converter and the negative input terminal of the power converter; and a bypass link directly connected between the positive input terminal of the power converter and the positive output terminal of the power converter, the bypass link comprising a switch, wherein the switch comprises an activated state and a deactivated state, and wherein when the switch is in the activated state, the bypass link provides a low impedance path between the PV positive output terminal and the positive output terminal of the power converter.
2. The system of claim 1, wherein the power converter comprises a DC-DC converter, a DC-AC inverter, a buck-boost converter, power conditioning electronics, sensing electronics, monitoring electronics, or a maximum power point tracking converter.
3. The system of claim 1, wherein the switch is a solid state switch.
4. The system of claim 1, wherein the power converter is configured to convert power received from the positive PV output terminal and the negative PV output terminal of the PV panel.
5. The system of claim 1, wherein the switch is configured to be activated based on a malfunction in the power converter.
6. The system of claim 1, wherein the bypass link further comprises one or more other switches serially connected to the switch.
7. The system of claim 1, wherein the bypass link is activated in response to a communication signal.
8. An apparatus comprising: a power converter comprising a positive input terminal, a negative input terminal, a positive output terminal, and a negative output terminal, wherein the power converter is configured to convert power from the positive input terminal and the negative input terminal to the positive output terminal and the negative output terminal; and a bypass link directly coupled between the positive input terminal and the positive output terminal, the bypass link comprising a switch, wherein the switch comprises an activated state and a deactivated state, wherein when the switch is activated, the bypass link provides a low impedance path between the positive input terminal and the positive output terminal.
9. The apparatus of claim 8, wherein the power converter comprises a DC-DC converter, a DC-AC inverter, a buck-boost converter, power conditioning electronics, sensing electronics, monitoring electronics, or a maximum power point tracking converter.
10. The apparatus of claim 8, wherein the switch is activated responsive to an electronic malfunction in the power converter.
11. The apparatus of claim 8, wherein the power converter is connected to a photovoltaic panel.
12. The apparatus of claim 8, wherein the switch is a solid state switch.
13. The apparatus of claim 8, wherein the bypass link further comprises one or more other switches serially connected to the switch.
14. The apparatus of claim 8, wherein the bypass link is activated in response to a communication signal.
15. A method comprising: harvesting power from a photovoltaic panel; converting the harvested power from a positive input terminal of a power converter and a negative input terminal of the power converter to a negative output terminal of the power converter and a positive output terminal of the power converter; and bypassing the power converter by activating a switch of a bypass link, wherein the bypass link is directly coupled between the positive input terminal of the power converter and the positive output terminal of the power converter, and wherein the activating the switch provides a low impedance path between the positive input terminal of the power converter and the positive output terminal of the power converter.
16. The method of claim 15, wherein the switch is activated responsive to an electronic malfunction of the power converter.
17. The method according to claim 15, wherein the activating the switch comprises: receiving, by the power converter, a communication signal.
18. The method of claim 15, further comprising deactivating the switch.
19. The method of claim 18, wherein the deactivating is responsive to a communication signal.
20. The method of claim 15, wherein the converting comprises a DC-DC conversion, a DC-AC conversion, a buck-boost conversion, power conditioning, sensing, monitoring, or a maximum power point tracking conversion.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The invention is herein described, by way of example only, with reference to the accompanying drawings, wherein:
(2) FIG. 1 illustrates an electrical power generation system including a photovoltaic panel and electronic module.
(3) FIG. 2 illustrates a flash test module of the prior art.
(4) FIG. 3 illustrates a general equivalent circuit, representing the electronic module shown in FIGS. 1 and 2 with a bypass applied, according to a feature of the present invention.
(5) FIG. 4 shows a flow chart of a method to flash test a photovoltaic panel according to an embodiment of the present invention.
(6) FIG. 5 is an activated bypass circuit, according to an embodiment of the present invention, of an electronic module connected to a photovoltaic panel and test module.
(7) FIG. 6 is a de-activated bypass circuit, according to an embodiment of the present invention of an electronic module connected to a photovoltaic panel.
(8) FIG. 7 is an activated bypass circuit, according to another embodiment of the present invention, of an electronic module connected to a photovoltaic panel and test module.
(9) FIG. 8 is a de-activated bypass circuit, according to another embodiment of the present invention of an electronic module connected to a photovoltaic panel.
(10) FIG. 8a is a de-activated bypass circuit using a fuse and power supply, according to another embodiment of the present invention of an electronic module connected to a photovoltaic panel.
(11) FIG. 8b is a de-activated bypass circuit using a fuse, power supply and silicone controlled rectifier (SCR), according to yet another embodiment of the present invention of an electronic module connected to a photovoltaic panel.
(12) FIG. 9 is an activated bypass circuit, according to yet another embodiment of the present invention, of an electronic module connected to a photovoltaic panel and test module.
(13) FIG. 10 is a de-activated bypass circuit, according to yet another embodiment of the present invention of an electronic module connected to a photovoltaic panel.
(14) FIG. 11 illustrates yet another way in which to de-activate bypass once a flash test has been performed according to a feature of the present invention.
(15) FIG. 12a shows a module connected to a compensation unit according to a feature of the present invention.
(16) FIG. 12b shows further details of the compensation unit shown in FIG. 12a, according to a feature of the present invention.
(17) FIG. 12c shows a simulation circuit, according to a feature of the present invention.
(18) FIG. 12d shows simulation results of a test circuit shown in FIG. 12c, according to a feature of the present invention.
(19) FIG. 12e shows another simulation circuit, according to a feature of the present invention.
(20) FIG. 12f shows the simulation results a test circuit shown in FIG. 12e, according to a feature of the present invention.
(21) FIG. 12g shows a simulation circuit, according to a feature of the present invention.
(22) FIG. 12h shows the compensated simulation results of a test circuit, according to a feature of the present invention.
(23) FIG. 12i which shows a method, according to a feature of the present invention.
(24) FIG. 12j which shows a method, according to a feature of the present invention.
(25) The foregoing and/or other aspects will become apparent from the following detailed description when considered in conjunction with the accompanying drawing figures.
DETAILED DESCRIPTION
(26) Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings; wherein like reference numerals refer to the like elements throughout. The embodiments are described below to explain the present invention by referring to the figures.
(27) Reference is now made back to FIG. 1 which illustrates electrical power generation system 14, including photovoltaic panel 10 connected to electronic module 12. In some embodiments of the present invention, electronic module 12 is “permanently attached” to photovoltaic panel 10. In other embodiments of the present invention, electronic module is integrated with photovoltaic panel 10 but is not “permanently attached” to photovoltaic panel 10. The term “permanently attached” as used herein refers to a method or device for attachment such that physical removal or attempt thereof, e.g. of electronic module 12 from photovoltaic panel 10, would result in damage, e.g. to electronic module 12 and/or panel 10. Any mechanism known in the art for “permanently attaching” may be applied indifferent embodiments of the present invention. When electronic module 12 is permanently attached to the photovoltaic panel 10, the operation of photovoltaic panel 10 ceases or connections thereof are broken on attempting to remove electronic module 12 from photovoltaic panel 10. One such mechanism for permanently attaching uses a thermoset adhesive, e.g. epoxy based resin, and hardener.
(28) Referring to FIG. 3, an example of electronic module 12 is illustrated in more detail. Electronic module 12 connects photovoltaic panel 10 and test module 20. Impedance Z1 is the series equivalent impedance of electronic module 12. Impedance Z2 is the equivalent input impedance of electronic module 12. Impedance Z3 is the equivalent output impedance of electronic module 12. Bypass link 40 when applied between the output of photovoltaic panel 10 and the input of test module 20 eliminates the effects of series equivalent impedance Z1 during a flash test. With bypass link 40 applied, impedances Z2 and Z3 are connected in parallel with resulting shunt impedance Z.sub.T given in Eq.1.
(29)
(30) Where impedances Z2 and Z3 are both high in value, ZT will have an insignificant effect upon a flash test of photovoltaic panel 10.
(31) Reference is made to FIGS. 4, 5 and 6 which illustrate embodiments of the present invention. FIG. 4 illustrates a flowchart for a method for flash testing a photovoltaic panel 10 by bypassing an electronic module 12 according to embodiments of the present invention. FIGS. 5 and 6 are corresponding system drawings according to embodiments of the present invention of electrical power generation system 14. FIG. 5 illustrates bypass 40 when bypass 40 is activated. With reference to FIG. 5, a single pole single throw (SPST) switch 50 activated by magnetic field of magnet 52 connects the output of photovoltaic panel 10 and the input of test module 20 to bypass electronic module 12 during a flash test of photovoltaic panel 10. SPST switch 50 in an embodiment of the present invention is a reed switch (for example, Part no: HYR 2031-1, Aleph America Corporation NV USA) or a reed relay, or a solid state switch. Bypass 40 of electronic module 12 is activated (step 201) by applying a magnetic field 52 to SPST switch 50 causing SPST switch 50 to close as shown in FIG. 5. The flash test is performed (step 203) using flash test module 20. After the flash test of photovoltaic panel 10, bypass 40 of electronic module 12 is de-activated by the removal of magnetic field 52 to SPST switch 50 (step 205). FIG. 6 illustrates photovoltaic panel 10 connected to the input of electronic module 12, with SPST switch 50 bypass de-activated (step 205).
(32) Reference is made to FIGS. 7 and 8 which illustrate another embodiment of the present invention. FIG. 7 illustrates bypass 40. With reference to FIG. 7, a fuse 50a connects the output of photovoltaic panel 10 and the input of test module 20 to bypass electronic module 12 during a flash test of photovoltaic panel 10. Referring back to FIG. 4, bypass 40 of electronic module 12 is activated (step 201) by virtue of fuse 50a being in an un-blown state as shown in FIG. 7 and SPST switch 5b being open circuit. SPST switch 5b in an embodiment of the present invention is a reed switch (for example, Part no: HYR 2031-1, Aleph America Corporation NV USA) or a reed relay, or a solid state switch. The flash test is performed (step 203) using flash test module 20. After the flash test of photovoltaic panel 10, bypass 40 of electronic module 12 is de-activated (step 205). FIG. 8 shows bypass 40 being de-activated (step 205). FIG. 8 shows photovoltaic panel 10 connected to the input of electronic module 12 and a power supply unit (PSU) 13 applied across the output of electronic module 12. SPST switch 5b is in a closed position because of the application of magnetic field 52.
(33) Reference now made to FIG. 11 which illustrates yet another way in which to deactivate bypass 40 (step 205) once a flash test has been performed (step 203) according to a feature of the present invention. Photovoltaic panel 10 is connected to the input of buck boost converter 12a. The output of buck boost converter 12a is connected to PSU 13. During deactivation of bypass 40 (step 205), a power line communication superimposed on the output of buck boost converter 12a via PSU 13, a wireless signal applied in the vicinity of buck boost converter 12a, or based on some logic circuitry—i.e. a specific supply voltage applied by PSU 13 causes MOSFETS G.sub.C and G.sub.A to turn on. MOSFETS G.sub.C and G.sub.A turned on causes a short circuit current I.sub.SC to flow from PSU 13 and through fuse 50a. The short circuit I.sub.SC current blows fuse 50a making fuse 50a open circuit and bypass 40 is de-activated (step 205).
(34) The closure of SPST switch 5b and application of PSU 13 applied across the output of electronic module 12, causes a short circuit current I.sub.SC to flow from PSU 13 through fuse 50a and SPST switch 5b. The short circuit I.sub.SC current blows fuse 50a making fuse 50a open circuit and the removal of magnetic field 52 de-activates bypass 40 (step 205).
(35) An alternative way of de-activating bypass 40 (step 205) is shown in FIG. 8a. FIG. 8a shows photovoltaic panel 10 connected to the input of electronic module 12 and a power supply unit (PSU) 13 applied across fuse 50a. The application of PSU 13 across fuse 50a, causes a short circuit current I.sub.SC to flow from PSU 13 and through fuse 50a. The short circuit I.sub.SC current blows fuse 50a making fuse 50a open circuit and bypass 40 is de-activated (step 205).
(36) Another way of de-activating bypass 40 (step 205) is shown in FIG. 8b. FIG. 8b shows photovoltaic panel 10 connected to the input of electronic module 12 and a power supply unit (PSU) 13 applied across the output of electronic module 12. The anode and cathode of a silicon controlled rectifier (SCR) 15 is connected in parallel across the output of photovoltaic panel 10 and the input of electronic module 12. The gate of an SCR 15 is connected inside electronic module 12 in such a way that the application of PSU 13 across the output of electronic module 12 causes a gate signal to be applied to the gate of SCR. A gate pulse applied to SCR 15 switches SCR 15 on. Alternative ways to get a pulse to the gate of SCR 15 include, power line communication superimposed on the output of electronic module 12 via PSU 13, a wireless signal applied in the vicinity of electronic module 12, or based on some logic circuitry—i.e. a specific supply voltage applied by PSU 13 causes a gate signal to be applied to SCR 15. A gate signal applied to SCR 15 and application of PSU 13 applied across the output of electronic module 12, causes a short circuit current I.sub.SC to flow from PSU 13 through fuse 50a and SCR 15. The short circuit I.sub.SC current blows fuse 50a making fuse 50a open circuit and bypass 40 is de-activated (step 205).
(37) Reference is now made to FIGS. 4, 9 and 10 which illustrate another embodiment of the present invention of electrical power generation system 14, particularly applicable in cases when the resulting shunt impedance Z.sub.T is small enough to disrupt the results of the flash test, such as being less than 1 Mega Ohm in electronic module 12. Referring back to FIG. 4, FIG. 4 illustrates a flowchart for a method for flash testing a photovoltaic panel 10 by bypassing an electronic module 12 according to embodiments of the present invention. FIG. 4 includes step 201 of activating a bypass, step 203 performing the flash and de-activating the bypass, step 205.
(38) FIG. 9 illustrates bypass 40 when bypass 40 is activated. With reference to FIG. 9, a single pole double throw (SPDT) switch 70, SPST switch 72 and SPDT switch 74, activated by magnetic field of magnet 52, connects the output of photovoltaic panel 10 and the input of test module 20 to perform the function of bypassing electronic module 12 during a flash test of photovoltaic panel 10. SPDT switches 70 and 74 in an embodiment of the present invention is a reed switch (for example, Part no: HYR-1555-form-C, Aleph America Corporation Reno, Nev. USA) or a reed relay, or a solid state switch. SPDT switches 70 and 74 when activated by magnetic field 52 provide open circuit impedance in place of shunt impedance Z.sub.T when electronic module 12 is being bypassed during a flash test of photovoltaic panel 10. The bypass 40 of electronic module 12 is activated (step 201) by applying a magnetic field 52 to SPST switch 72 and SPDT switches 70 and 74 causing switch positions shown in FIG. 9. Next the flash test is performed (step 203) using flash test module 20. After the flash test of photovoltaic panel 10, the bypass of electronic module 12 is de-activated by the removal of magnetic field 52 to SPST switch 50 and SPDT switches 70 and 74 (step 205). FIG. 10 shows photovoltaic panel 10 connected to electronic module 12 with SPST switch 50 and SPDT switches 70 and 74 de-activated (step 205).
(39) During operation of electrical power generation system 14, DC power is produced by photovoltaic panel 10 and transferred to the input of electronic module 12. Electronic module 12 is typically a buck-boost converter circuit to perform DC to DC conversion or an inverter converting DC to AC or a circuit performing maximum power point tracking (MPPT).
(40) Reference is now made to FIG. 12a which shows a module 12a connected to compensation unit 17a according to a feature of the present invention. Photovoltaic panel 10 is connected to the input of buck boost converter 12a. The output of buck boost converter 12a is connected to compensation unit 17a at terminals A and the other terminals B of unit 17a is connected to conventional flash tester 17. Fuse 50a provides a low impedance serial path between panel 10 and conventional flash tester 17/compensation unit 17a. With bypass link 50a applied (i.e. fuse link 50a is not blown), the shunt impedance (Z.sub.T) of circuit 12a connected to conventional flash tester 17/compensation unit 17a comes from capacitors C1 and C2 now connected in parallel in circuit 12a via link 50a. If the total value of capacitance (C1+C2) is large (typically around 50 micro-farads), the low shunt impedance Z.sub.T may have a significant effect on the result of a flash test performed by tester 17 on panels 10.
(41) Reference now made to FIG. 12b which shows further details of compensation unit 17a according to a feature of the present invention. Compensation unit 17a has a programmable current injector 130, circuit analyzer 128 and processor 126.
(42) Programmable current injector 130 has a voltage source E1 which may be connected to an electronic module 12/12a using terminals A. A first positive terminal of voltage source E1 and a first negative terminal of voltage source E1 provides terminals A. The first positive terminal of voltage source E1 is connected to node P. A second positive terminal and a second negative terminal of voltage source E1 is connected across a series connection of capacitor C.sub.p and resistance R.sub.p at node M and ground. One end of capacitor C.sub.p connects to node M and the other end of capacitor C.sub.p connects to one end of resistor R.sub.p at node N. The other end of resistor R.sub.p connects to ground. A first positive terminal of current source G.sub.2 connects to node P and a first negative terminal of current source G2 connects to ground. Terminals B are provided from connecting to node P and ground. A second positive terminal of current source G.sub.2 connects to node N and a second negative terminal of current source G.sub.2 connects to ground.
(43) The input to circuit analyzer 128 is derived from node P. The output of circuit analyzer 128 goes into the input of processor 126. Processor 126 has two outputs (shown by dotted lines) which program/control current source G2 and voltage source E1. Circuit analyzer 128 measures a circuit parameter of electronic module 12/12a. The circuit parameter measured by circuit analyzer 128 is preferably the shunt impedance of electronic module 12/12a. Processor 126 is preferably configured to program/control current injector 130 using the circuit parameter measured by circuit analyzer 128.
(44) Reference is now made to FIG. 12c and to FIG. 12d according to a feature of the present invention. FIG. 12c shows a simulation circuit 121a which has a pulse generator 120 with an output voltage and current 124 connected to a test circuit 122a. Simulation circuit 121 is an equivalent circuit representation of a flash testing system. Pulse generator 120 is the equivalent circuit representation of a flash lamp 16 used to irradiate a photovoltaic panel 10 and test circuit 122a being the equivalent circuit representation of a photovoltaic panel 10. Pulse generator 120 has a voltage V1 which is a pulse of typically 33 volts peak, rise and fall time of 0.01 milliseconds and pulse duration of 0.54 milliseconds. The pulse from voltage V 1 is applied to test circuit 122a via resistor R.sub.g which is connected in series between voltage V 1 and test circuit 122a. Test circuit 122a has a resistance Rpm which is connected in series between the output of pulse generator 120 and ground. FIG. 12d shows the simulation results of test circuit 122a as output voltage and current 124 as a result of pulse V 1 being applied to test circuit 122a. Output voltage and current 124 has a peak voltage of 27V and current of 5.4 A which are in phase.
(45) Reference is now made to FIG. 12e and to FIG. 12f according to a feature of the present invention. FIG. 12e shows a simulation circuit 121b which has a pulse generator 120 with an output voltage and current 124 connected to a test circuit 122b. Simulation circuit 121b has the same elements as shown in FIG. 12b but with the addition of a capacitor C.sub.m connected in parallel with resistor R.sub.pm in test circuit 122b. Capacitor C.sub.m in test circuit 122b represents the total shunt capacitance for example of module 12a connected to panel 10. FIG. 12f shows the simulation results of test circuit 122a as output voltage and current 124 of test circuit 122b as a result of pulse V1 (33 volts peak, rise and fall time of 0.01 milliseconds and pulse duration of 0.54 milliseconds) being applied to test circuit 122b. Output voltage and current 124 are now not in phase with voltage (27V) lagging and current peaks which reach 40A.
(46) Reference is now made to FIG. 12g, FIG. 12h and FIG. 12i according to a feature of the present invention. FIG. 12g shows a simulation circuit 121c which has a pulse generator 120 with an output voltage and current 124 connected to a test circuit 122b. Simulation circuit 121c has the same elements as shown in FIG. 12e but with the addition of compensation unit 17a connected in parallel with capacitor C.sub.m in test circuit 122b. Capacitance C.sub.m represents the total shunt capacitance for example of module 12a connected to panel 10 with bypass 50a activated as an un-blown fuse link (step 1201). In compensation unit 17a, circuit analyzer 128 measures a circuit parameter of test module 122b. The circuit parameter measured by circuit analyzer 128 is preferably the shunt impedance of test module 122b or the shunt capacitance of test module 122b. Processor 126 is preferably configured to program/control current injector 130 using the circuit parameter measured by circuit analyzer 128. Compensation unit 17a can inject a current into test module 122b in order to compensate for the shunt capacitance of test module 122b (step 1203) when performing a flash test. FIG. 12h shows the compensated output voltage and current 124 of test circuit 122b as a result of pulse V1 (33 volts peak, rise and fall time of 0.01 milliseconds and pulse duration of 0.54 milliseconds) being applied to test circuit 122b. Output voltage and current 124 are now in phase and output voltage and current 124 represents the current/voltage characteristics of resistance Rpm in test circuit 122b.
(47) Reference is now made again to FIGS. 12a, 12b and to FIG. 12j which shows a method 1220, according to an embodiment of the present invention. With link 50a activated as an un-blown fuse link (step 1201) a low impedance path exists between the input and the output of module 12a. Prior to a flash test of panel 10 using tester 17, located in compensation unit 17a, is circuit analyzer 128 which measures (step 1223) a circuit parameter of the output of electronic module 12a with the input of module 12a connected to pane 110. The circuit parameter measured by circuit analyzer 128 with fuse link 50a connected according to step 1221 may be the impedance of capacitors C1 and C2 in parallel with panel 10 and with flash tester 17 disconnected. Alternatively, the value of shunt impedance for module 12a may be measured (to provide a noted value) prior to attachment to panel 10. Processor 126 is preferably configured to program (step 1225) and/or control current injector 130 using the circuit parameter measured by circuit analyzer 128 or from the noted value. With flash tester 17 operatively attached to compensation unit 17a, module 12a and panel 10, a flash test is performed where the current injection by compensation unit 17a simultaneously triggers (step 1227) a flash test of a panel using tester 17.
(48) The definite articles “a”, “an” is used herein, such as “a converter”, “a switch” have the meaning of “one or more” that is “one or more converters” or “one or more switches”.
(49) Although selected embodiments of the present invention have been shown and described, it is to be understood the present invention is not limited to the described embodiments. Instead, it is to be appreciated that changes may be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and the equivalents thereof.
