Fabricating a steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin disposed on the substrate, a source/drain disposed on the substrate adjacent to the fin, a gate disposed upon the fin, a cap disposed on the gate, a trench contact formed on and in contact with the source/drain, and a source/drain contact formed on an in contact with the trench contact. A recess is formed in a portion of the source/drain contact using a recess patterning process. A bi-stable resistive system (BRS) material is deposited in the recess in contact with the portion of the source/drain contact. A metallization layer is formed in contact upon the BRS material, a portion of the source/drain contact, the BRS material, and a portion of the metallization layer contact forming a reversible switch.

An ion trap device is provided as well as a method of manufacturing the ion trap device including a substrate, central DC electrode, RF electrode, side electrode and an insulating layer. Disposed over the substrate, the central DC electrode includes DC connector pad and DC rail connected thereto. The RF electrode includes RF rail adjacent to the DC rail and RF pad connected to RF rail. The side electrode has RF electrode disposed between thereof and the central DC electrode. The insulating layer supports one of the central DC electrode, RF electrode and side electrode, on a top surface of the substrate. The insulating layer includes first insulating layer and second insulating layer disposed over the first insulating layer, and the second insulating layer includes an overhang protruding with respect to the first insulating layer in a width direction of the ion trap device.

Subject matter disclosed herein may relate to programmable fabrics including correlated electron switch devices.

Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform a switching function. In embodiments, a correlated electron material may be doped using dopant species derived from one or more precursors utilized to fabricate nearby structures such as, for example, a conductive substrate or a conductive overlay.

Subject matter disclosed herein may relate to correlated electron switches that are capable of asymmetric set or reset operations.

Disclosed is a method for the manufacture of a CEM device comprising forming a thin film of a correlated electron material having a predetermined electrical impedance when the CEM device in its relatively conductive (low impedance) state, wherein the forming of the CEM thin film comprises forming a d- or f-block metal or metal compound doped by a physical or chemical vapor deposition with a predetermined amount of a dopant comprising a back-donating ligand for the metal.

Embodiments of the present disclosure propose two methods for integrating vacancy centers (VCs) on semiconductor substrates for forming VC-based spin qubit devices. The first method is based on using a self-assembly process for integrating VC islands on a semiconductor substrate. The second method is based on using a buffer layer of a III-N semiconductor material over a semiconductor substrate, and then integrating VC islands in an insulating carbon-based material such as diamond that is either grown as a layer on the III-N buffer layer or grown in the openings formed in the III-N buffer layer. Integration of VC islands on semiconductor substrates typically used in semiconductor manufacturing according to any of these methods may provide a substantial improvement with respect to conventional approaches to building VC-based spin qubit devices and may promote wafer-scale integration of VC-based spin qubits for use in quantum computing devices.

Provided is a field effect transistor (FET) including a gate insulating film with a laminated (two-layer) structure having more improved characteristics for practical use. The FET includes a perovskite-type structure single-crystalline composite oxide substrate 1 that forms a channel layer; and a gate insulating film with a laminated structure in which para-xylylene polymer films 4 and 5 and hafnium oxide 6 are laminated in this order on the single-crystalline composite oxide substrate 1.

Generally discussed herein are techniques for and systems and apparatuses configured to control phonons using an electric field. In one or more embodiments, an apparatus can include electrical contacts, two quantum dots embedded in a semiconductor such that when an electrical bias is applied to the electrical contacts, the electric field produced by the electrical bias is substantially parallel to an axis through the two quantum dots, and a phononic wave guide coupled to the semiconductor, the phononic wave guide configured to transport phonons therethrough.

Disclosed is a method for the manufacture of a CEM device comprising forming a thin film of a correlated electron material having a predetermined electrical impedance when the CEM device in its relatively conductive (low impedance) state, wherein the forming of the CEM thin film comprises forming a d- or f-block metal or metal compound doped by a physical or chemical vapour deposition with a predetermined amount of a dopant comprising a back-donating ligand for the metal.