Certain aspects relate to systems and techniques for folded optic stereoscopic imaging, wherein a number of folded optic paths each direct a different one of a corresponding number of stereoscopic images toward a portion of a single image sensor. Each folded optic path can include a set of optics including a first light folding surface positioned to receive light propagating from a scene along a first optical axis and redirect the light along a second optical axis, a second light folding surface positioned to redirect the light from the second optical axis to a third optical axis, and lens elements positioned along at least the first and second optical axes and including a first subset having telescopic optical characteristics and a second subset lengthening the optical path length. The sensor can be a three-dimensionally stacked backside illuminated sensor wafer and reconfigurable instruction cell array processing wafer that performs depth processing.

The present invention relates to near-infrared quantum emitters, and in particular carbon nanostructures with chemically incorporated fluorescent defects, and methods of synthesizing near-infrared emitting nanostructures.

Subject matter disclosed herein may relate to devices formed from correlated electron material.

IR emission devices comprising an array of polaritonic IR emitters arranged on a substrate, where the emitters are coupled to a heater configured to provide heat to one or more of the emitters. When the emitters are heated, they produce an infrared emission that can be polarized and whose spectral emission range, emission wavelength, and/or emission linewidth can be tuned by the polaritonic material used to form the elements of the array and/or by the size and/or shape of the emitters. The IR emission can be modulated by the induction of a strain into a ferroelectric, a change in the crystalline phase of a phase change material and/or by quickly applying and dissipating heat applied to the polaritonic nanostructure. The IR emission can be designed to be hidden in the thermal background so that it can be observed only under the appropriate filtering and/or demodulation conditions.

Certain aspects relate to wafer level optical designs for a folded optic stereoscopic imaging system. One example folded optical path includes first and second reflective surfaces defining first, second, and third optical axes, and where the first reflective surface redirects light from the first optical axis to the second optical axis and where the second reflective surface redirects light from the second optical axis to the third optical axis. Such an example folded optical path further includes wafer-level optical stacks providing ten lens surfaces distributed along the first and second optical axes. A variation on the example folded optical path includes a prism having the first reflective surface, wherein plastic lenses are formed in or secured to the input and output surfaces of the prism in place of two of the wafer-level optical stacks.

A technique relates to a semiconductor device. First metal contacts are formed on top of a substrate. The first metal contacts are arranged in a first direction, and the first metal contacts are arranged such that areas of the substrate remain exposed. Insulator pads are positioned at predefined locations on top of the first metal contacts, such that the insulator pads are spaced from one another. Second metal contacts are formed on top of the insulator pads, such that the second metal contacts are arranged in a second direction different from the first direction. The first and second metal contacts sandwich the insulator pads at the predefined locations. Surface-sensitive conductive channels are formed to contact the first metal contacts and the second metal contacts. Four-terminal devices are defined by the surface-sensitive conductive channels contacting a pair of the first metal contacts and contacting a pair of the metal contacts.

According to one embodiment, a memory device includes a first layer, a second layer, and a third layer provided between the first layer and the second layer. The first layer includes first interconnections and a first insulating portion. The first interconnections extend in a first direction. The first insulating portion is provided between the first interconnections. The second layer includes a plurality of second interconnections and a second insulating portion. The second interconnections extend in a second direction crossing the first direction. The second insulating portion is provided between the second interconnections. The third layer includes a ferroelectric portion and a paraelectric portion. The ferroelectric portion and the paraelectric portion include hafnium oxide.

IR emission devices comprising an array of polaritonic IR emitters arranged on a substrate, where the emitters are coupled to a heater configured to provide heat to one or more of the emitters. When the emitters are heated, they produce an infrared emission that can be polarized and whose spectral emission range, emission wavelength, and/or emission linewidth can be tuned by the polaritonic material used to form the elements of the array and/or by the size and/or shape of the emitters. The IR emission can be modulated by the induction of a strain into a ferroelectric, a change in the crystalline phase of a phase change material and/or by quickly applying and dissipating heat applied to the polaritonic nanostructure. The IR emission can be designed to be hidden in the thermal background so that it can be observed only under the appropriate filtering and/or demodulation conditions.

A piezoelectronic device with novel force amplification includes a first electrode; a piezoelectric layer disposed on the first electrode; a second electrode disposed on the piezoelectric layer; an insulator disposed on the second electrode; a piezoresistive layer disposed on the insulator; a third electrode disposed on the insulator; a fourth electrode disposed on the insulator; a semi-rigid housing surrounding the layers and the electrodes; wherein the semi-rigid housing is in contact with the first, third, and fourth electrodes and the piezoresistive layer; wherein the semi-rigid housing includes a void. The third and fourth electrodes are on the same plane and separated from each other in the transverse direction by a distance.

A piezoelectronic device with novel force amplification includes a first electrode; a piezoelectric layer disposed on the first electrode; a second electrode disposed on the piezoelectric layer; an insulator disposed on the second electrode; a piezoresistive layer disposed on the insulator; a third electrode disposed on the insulator; a fourth electrode disposed on the insulator; a semi-rigid housing surrounding the layers and the electrodes; wherein the semi-rigid housing is in contact with the first, third, and fourth electrodes and the piezoresistive layer; wherein the semi-rigid housing includes a void. The third and fourth electrodes are on the same plane and separated from each other in the transverse direction by a distance.