There is provided a SiC substrate including a biaxially oriented SiC layer, and, in a Si surface and a C surface of the SiC substrate, a difference between a maximum value k.sub.max and a minimum value k.sub.min of a Raman shift value is 0.50 cm.sup.1 or less. The Raman shift value is obtained by, in the Si surface, measuring the Raman shift value indicating a peak corresponding to a transverse acoustic branch of a Raman spectrum at 1 mm intervals on two straight lines passing through a central point of the Si surface and being orthogonal to each other, and, in the C surface, measuring the Raman shift value indicating a peak corresponding to a transverse acoustic branch of a Raman spectrum at 1 mm intervals on two straight lines passing through a central point of the C surface and being orthogonal to each other.

A semiconductor device includes a semiconductor die, a detection structure, a path control circuit and a detection circuit. The semiconductor die includes a central region in which a semiconductor integrated circuit is provided and an external region surrounding the central region. The detection structure is provided in the external region. The path control circuit includes a plurality of switches that controls electrical connection of the detection structure. The detection circuit determines whether a defect is present in the semiconductor die and a location of the defect based on a difference signal. The difference signal corresponds to a difference between a forward direction test output signal and a backward direction test output signal obtained by propagating a test input signal through the detection structure in a forward direction and a backward direction, respectively, via the path control circuit.

A semiconductor package, includes: a base chip having a front surface and a back surface opposite to the front surface, the base chip including bump pads, wafer test pads, and package test pads, disposed on the front surface; connection structures disposed on the front surface of the base chip and connected to the bump pads; and semiconductor chips stacked on the back surface of the base chip, wherein each of the wafer test pads is smaller than the package test pads.

A control device configured to control a supply condition of a gas which is supplied between two substrates that are to be bonded to each other by a substrate bonding device, is configured to control the supply condition based on a measurement result obtained by a measurement in relation to at least one of the substrate, another substrate bonded before the substrate is bonded, or the substrate bonding device, and the two substrates are bonded to each other by a contact region expanding after the contact region is formed in a center.

An inspection apparatus includes a light source that generates and emits light to a substrate to be inspected, a lens that captures the light emitted to and reflected by the substrate, a detection unit that detects the light captured by the lens, and a determination unit that calculates a reflectance of light of the substrate based on an intensity of the light generated by the light source and an intensity of the light detected by the detection unit, and performs an abnormality determination of the substrate based on the calculated reflectance.

The present disclosure is to provide a wafer carrier substrate for carrying a wafer on which a plurality of chips is formed, elements to be measured being built in the plurality of chips. The wafer carrier substrate includes: a vacuuming hole for vacuuming of the wafer placed on the wafer carrier substrate; a wafer alignment guide for determining a predetermined position of the wafer placed on the wafer carrier substrate; and a mark for determining a probe contact position. It is possible to recognize a specific shot, without any additional processing of the semiconductor wafer.

According to embodiments, an inspection apparatus includes an imaging mechanism, an image acquisition circuit that extracts an outline from image data of a sample, a development circuit that generates a developed image, an outline data generation circuit that generates data of an outline point of a pattern of the developed image, an area calculation circuit that calculates an area of a region not included in the pattern in a circle centered on the outline point, an estimation circuit that calculates a resizing amount of the outline point based on the area, and a reference image generation circuit that executes a resizing process of data of the outline point based on the resizing amount and generates a reference image based on the data of the outline point subjected to the resizing process.

A wafer thickness measurement device of the present invention obtains, based on: first and second interferometer reference measurement results obtained by measuring, with an A-surface optical interferometer and a B-surface optical interferometer, a reference measurement point on a reference piece having the reference measurement point at which the reference piece has a known thickness; first and second distance meter reference measurement results obtained by measuring the reference measurement point with an A-surface distance meter and a B-surface distance meter; first and second interferometer measurement results obtained by measuring a measurement point of the wafer with the A-surface optical interferometer and the B-surface optical interferometer; and first and second distance meter measurement results obtained by measuring the measurement point with the A-surface distance meter and the B-surface distance meter, and obtains a thickness, of the wafer, at the measurement point.

A semiconductor package is provided. The semiconductor package includes a first semiconductor substrate, a first semiconductor element layer on an upper surface of the first semiconductor substrate, a first wiring structure on the first semiconductor element layer, a first connecting pad connected to the first wiring structure, a first test pad connected to the first wiring structure, a first front side bonding pad connected to the first connecting pad and including copper (Cu), and a second front side bonding pad connected to the first front side bonding pad and including copper (Cu) which has a nanotwin crystal structure different from a crystal structure of copper (Cu) included in the first front side bonding pad, wherein a width of the first front side bonding pad in the horizontal direction is different from a width of the second front side bonding pad in the horizontal direction.

A method of forming silicon within a gap on a surface of a substrate. The method includes use of two or more pyrometers to measure temperatures at two or more positions on a substrate and/or a substrate support and a plurality of heaters that can be divided into zones of heaters, wherein the heaters or zones of heaters can be independently controlled based on the measured temperatures and desired temperature profiles.