A silicon carbide wafer, including: a semiconductor substrate containing silicon carbide and having a first surface and a second surface opposite to each other; an epitaxial layer provided at the first surface of the semiconductor substrate and having a dopant concentration lower than that a dopant concentration of the semiconductor substrate; and a crystal defect introduced region provided in the semiconductor substrate, at a predetermined depth from the first surface of the semiconductor substrate, the crystal defect introduced region being in contact with the epitaxial layer and containing a number of point defects that are atomic vacancies created by irradiation of an electron beam on the semiconductor substrate.

A method of protecting an edge region of a substrate includes receiving a substrate into a processing chamber. The substrate includes an exposed silicon-containing edge region (e.g., a bevel region of a wafer substrate) surrounding an interior region underlying a resist layer. The method further includes treating the exposed silicon-containing edge region and the resist layer with a metal halide precursor (such as a tungsten halide) to selectively convert the exposed silicon-containing edge region to a metal-containing protective layer (e.g., including a metal silicide such as tungsten silicide and/or a pure metal such as tungsten). The metal-containing protective layer may be configured to protect the edge region of the substrate during subsequent processing, such as an etch process during which exposed surfaces of the interior region are etched.

A method of preventing basal plane dislocations (BPDs) from expanding from a SiC substrate or a highly doped buffer layer into an epitaxial device/active layer comprising the steps of providing a substrate, etching the substrate, converting BPDs to electrically benign threading edge dislocations, growing a first buffer layer on the substrate, creating a growth interrupt layer or second etch layer, growing a second buffer layer, growing a drift layer, and preventing BPDs from expanding into the drift layer. A device capable of preventing basal plane dislocations (BPDs) from expanding from a SiC substrate or a highly doped buffer layer into an epitaxial device/active layer comprising a substrate, a first buffer layer, a growth interrupt layer or etch layer, a second buffer layer and a drift layer. The drift layer carrier lifetime is not reduced. BPD expansion is prevented at current densities up to 12 kA/cm.sup.2.

A method for producing a semiconductor structure comprises: a) providing a working layer of a semiconductor material; b) providing a carrier substrate of a semiconductor material; c) depositing a thin film of a semiconductor material different from that or those of the working layer and the carrier substrate on a free face to be joined of the working layer and/or the carrier substrate; d) directly joining the free faces of the working layer and the carrier substrate, e) annealing the joined structure at an elevated temperature to bring about segmentation of the encapsulated thin film and form a semiconductor structure comprising an interface region between the working layer and the carrier substrate, the interface region comprising: regions of direct contact between the working layer and the carrier substrate; and agglomerates comprising the semiconductor material of the thin film adjacent the regions of direct contact.

A technique includes (a) preparing a substrate including a first region, which forms an outer surface of a recess and is adjacent to an opening of the recess and whose surface is terminated by a first termination, and a second region, which forms an inner surface of the recess and whose surface is terminated by the first termination; and (b) removing the first termination in the first region by exposing the substrate to a first processing solution containing a liquid that reacts with the first termination, so that a density of the first termination in the first region is smaller than a density of the first termination in the second region.

A method for manufacturing a group III nitride semiconductor substrate, that includes: growing a first AlN buffer layer on an Si substrate at a first growth temperature; growing a second AlN buffer layer on the first AlN buffer layer at a second growth temperature higher than the first growth temperature; and growing a group III nitride semiconductor layer on the second AlN buffer layer, wherein an Al raw material and an N raw material are alternately repeatedly fed in the growing the first AlN buffer layer.

A method for making a semiconductor device may include forming a superlattice gettering layer on a substrate. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may also include forming a memory device above the superlattice gettering layer including a metal induced crystallization (MIC) channel adjacent the semiconductor substrate, and a gate associated with the MIC channel. The superlattice gettering layer may further include gettered metal particles from the MIC channel.