Provided is a solid electrolyte including an epitaxial thin film crystal made of an electrolyte containing at least lithium.

A lithium ion secondary battery includes a positive electrode, a negative electrode, and an electrolyte provided between the positive electrode and the negative electrode. The positive electrode includes a positive electrode current collector and a positive electrode active material layer over the positive electrode current collector. The positive electrode active material layer includes a plurality of lithium-containing composite oxides each of which is expressed by LiMPO.sub.4 (M is one or more of Fe (II), Mn (II), Co (II), and Ni (II)) that is a general formula. The lithium-containing composite oxide is a flat single crystal particle in which the length in the b-axis direction is shorter than each of the lengths in the a-axis direction and the c-axis direction. The lithium-containing composite oxide is provided over the positive electrode current collector so that the b-axis of the single crystal particle intersects with the surface of the positive electrode current collector.

A lithium ion secondary battery includes a positive electrode, a negative electrode, and an electrolyte provided between the positive electrode and the negative electrode. The positive electrode includes a positive electrode current collector and a positive electrode active material layer over the positive electrode current collector. The positive electrode active material layer includes a plurality of lithium-containing composite oxides each of which is expressed by LiMPO.sub.4 (M is one or more of Fe (II), Mn (II), Co (II), and Ni (II)) that is a general formula. The lithium-containing composite oxide is a flat single crystal particle in which the length in the b-axis direction is shorter than each of the lengths in the a-axis direction and the c-axis direction. The lithium-containing composite oxide is provided over the positive electrode current collector so that the b-axis of the single crystal particle intersects with the surface of the positive electrode current collector.

A polymer opal material comprises a three dimensionally periodic arrangement of core particles in a matrix material and exhibits structural color via Bragg reflection. IN a process for manufacturing such a material, a sandwich structure is provided, of a precursor composite material held between first and second sandwiching layers. A relative shear strain of at least 10% is imposed on the precursor composite material by curling the sandwich structure around a roller. The shear strain is cycled, in order to promote the formation of the three dimensional periodic arrangement.

A nanocomposite comprising metal and carbon-based nanotube (CNT), wherein the carbon-based nanotube comprises a doping element selected from the group consisting of boron (B), iron (Fe), zinc (Zn), nickel (Ni), cadmium (Cd), tin (Sn), antimony (Sb), Nitrogen (N) and the combination thereof, and methods of making the nanocomposite.

A semiconductor single-crystal silicon, is produced from a silicon substrate wafer containing interstitial oxygen in a concentration of more than 510.sup.16 AT/cm.sup.3 (new ASTM) by an RTA treatment of the wafer in a first heat treatment at a first temperature in a temperature range of not less than 1200 C. and not more than 1260 C. for a period of not less than 5 s and not more than 30 s, where the front side of the substrate wafer is exposed to an atmosphere containing argon; a second heat treatment at a second temperature in a temperature range of not less than 1150 C. and not more than 1190 C. for a period of not less than 15 s and not more than 20 s, where the front side of the wafer is exposed to an argon and ammonia, atmosphere, and a third heat treatment at a third temperature in a temperature range of not less than 1160 C. and not more than 1190 C. for a period of not less than 20 s and not more than 30 s, where the front side of the wafer is exposed to an atmosphere containing argon.

A semiconductor single-crystal silicon, is produced from a silicon substrate wafer containing interstitial oxygen in a concentration of more than 510.sup.16 AT/cm.sup.3 (new ASTM) by an RTA treatment of the wafer in a first heat treatment at a first temperature in a temperature range of not less than 1200 C. and not more than 1260 C. for a period of not less than 5 s and not more than 30 s, where the front side of the substrate wafer is exposed to an atmosphere containing argon; a second heat treatment at a second temperature in a temperature range of not less than 1150 C. and not more than 1190 C. for a period of not less than 15 s and not more than 20 s, where the front side of the wafer is exposed to an argon and ammonia, atmosphere, and a third heat treatment at a third temperature in a temperature range of not less than 1160 C. and not more than 1190 C. for a period of not less than 20 s and not more than 30 s, where the front side of the wafer is exposed to an atmosphere containing argon.

There is provided a SiC substrate including a biaxially oriented SiC layer, and, in a Si surface and a C surface of the SiC substrate, a difference between a maximum value k.sub.max and a minimum value k.sub.min of a Raman shift value is 0.50 cm.sup.1 or less. The Raman shift value is obtained by, in the Si surface, measuring the Raman shift value indicating a peak corresponding to a transverse acoustic branch of a Raman spectrum at 1 mm intervals on two straight lines passing through a central point of the Si surface and being orthogonal to each other, and, in the C surface, measuring the Raman shift value indicating a peak corresponding to a transverse acoustic branch of a Raman spectrum at 1 mm intervals on two straight lines passing through a central point of the C surface and being orthogonal to each other.

There is provided a SiC substrate including a biaxially oriented SiC layer, and, in a Si surface and a C surface of the SiC substrate, a difference between a maximum value k.sub.max and a minimum value k.sub.min of a Raman shift value is 0.50 cm.sup.1 or less. The Raman shift value is obtained by, in the Si surface, measuring the Raman shift value indicating a peak corresponding to a transverse acoustic branch of a Raman spectrum at 1 mm intervals on two straight lines passing through a central point of the Si surface and being orthogonal to each other, and, in the C surface, measuring the Raman shift value indicating a peak corresponding to a transverse acoustic branch of a Raman spectrum at 1 mm intervals on two straight lines passing through a central point of the C surface and being orthogonal to each other.

Disclosed herein are methods and systems for epitaxial crystallization on an integrated processing architecture. In some embodiments, a method may include performing a first plasma treatment on a semiconductor substrate to remove a native oxide layer along an upper surface of the semiconductor substrate, and forming a film layer over the upper surface by performing a second plasma treatment on the semiconductor substrate. The method may further include performing an ion implantation process to crystallize the film layer, wherein the implant process comprises delivering an ion species to the film layer while the semiconductor substrate is at a temperature greater than 100 C.