Atomic layer deposition (ALD) processes for forming Group VA element containing thin films, such as Sb, Sb—Te, Ge—Sb and Ge—Sb—Te thin films are provided, along with related compositions and structures. Sb precursors of the formula Sb(SiR.sup.1R.sup.2R.sup.3).sub.3 are preferably used, wherein R.sup.1, R.sup.2, and R.sup.3 are alkyl groups. As, Bi and P precursors are also described. Methods are also provided for synthesizing these Sb precursors. Methods are also provided for using the Sb thin films in phase change memory devices.

This disclosure discloses an array substrate, and a production method, a display panel, and a display apparatus thereof. Particularly, this disclosure proposes a method of producing an array substrate, having the following steps: providing a substrate having a drive transistor region and a switch transistor region thereon; forming an preset layer for active layer on a side of the substrate; patterning the preset layer for active layer to form a drive active layer and a switch active layer, wherein an orthographic projection of the drive active layer on the substrate is located in the drive transistor region, an orthographic projection of the switch active layer on the substrate is located in the switch transistor region, and a carrier concentration in the drive active layer is less than a carrier concentration in the switch active layer.

A workpiece unit that includes a workpiece, a tape stuck to the workpiece; and an annular frame to which an outer circumferential edge of the tape is stuck and which has an opening defined centrally therein. The workpiece is disposed in the opening in the annular frame and supported on the annular frame by the tape, and at least one of the tape and the annular frame has an irreversible discoloring section that discolors in response to an external stimulus. Such a configuration makes it possible to determine whether or not a process involving an external stimulus has been carried out on the workpiece unit, based on the appearance of the workpiece unit (i.e., based on whether the irreversible discoloring section has been discolored or not).

A light receiving device comprises a substrate of a first type on a first electrode, a first region of the first type on the substrate, second regions of the first type arrayed on the first region, and third regions of a second type on the second regions. A first isolation portion is between the adjacent second regions and adjacent third regions. A second isolation portion comprising a metal is embedded the first isolation portions. A fourth region of the second type is on the first region and spaced from the second regions in a second direction with a pair of fifth regions thereon. An insulating film is on the fourth region and the pair of fifth regions. A second electrode is on the insulating film between the pair of fifth regions. The second electrode is comprised of the same metal as the second isolation portion.

Disclosed herein are a method of forming a transition metal dichalcogenide thin film and a method of manufacturing a device including the same. The method of forming a transition metal dichalcogenide thin film includes: providing a substrate in a reaction chamber; depositing a transition metal dichalcogenide thin film on the substrate using a sputtering process that uses a transition metal precursor and a chalcogen precursor and is performed at a first temperature; and injecting the chalcogen precursor in a gas state and heat-treating the transition metal dichalcogenide thin film at a second temperature that is higher than the first temperature. The substrate may include a sapphire substrate, a silicon oxide (SiO.sub.2) substrate, a nanocrystalline graphene substrate, or a molybdenum disulfide (MoS.sub.2) substrate.

Provided is a film for manufacturing a semiconductor part in which an evaluation step accompanied with a temperature change, a segmenting step, and a pickup step can be commonly performed, a method for manufacturing a semiconductor part, a semiconductor part, and an evaluation method. The film includes a base layer, and an adhesive layer disposed on one surface side of the base layer, wherein the ratio RE (=E′(160)/E′(−40)) of the elastic modulus of the base layer at 160° C. to the elastic modulus of the base layer at −40° C. is RE≥0.01, and the elastic modulus E′(−40) is 10 MPa to less than 1000 MPa. The method includes bonding the adhesive layer to a back surface of a semiconductor wafer, separating the semiconductor wafer into segments to obtain semiconductor parts, and separating the semiconductor parts from the adhesive layer, and includes a step of evaluating.

A method of evaluating metal contamination by measuring the amount of metal contaminants to a silicon wafer in a rapid thermal processing apparatus includes steps of obtaining a Si single crystal grown by the Czochralski method at a pulling rate of 1.0 mm/min or lower, the crystal having oxygen concentration of 1.3×10.sup.18 atoms/cm.sup.3 or less, slicing silicon wafers from the Si single crystal except regions of 40 mm toward the central portion from the head of the single crystal and 40 mm toward the central portion from the tail, heat-treating the silicon wafer with a rapid thermal processing apparatus and transferring contaminants from members in a furnace of the rapid thermal processing apparatus to the silicon wafer, and measuring a lifetime of the silicon wafer to which contaminants are transferred.

Disclosed herein are memory cells and memory arrays, as well as related methods and devices. For example, in some embodiments, a memory device may include: a support having a surface; and a three-dimensional array of memory cells on the surface of the support, wherein individual memory cells include a transistor and a capacitor, and a channel of the transistor in an individual memory cell is oriented parallel to the surface.

Embodiments disclosed herein include semiconductor devices and methods of forming such devices. In an embodiment the semiconductor device comprises a first semiconductor layer, where first transistors are fabricated in the first semiconductor layer, and a back end stack over the first transistors. In an embodiment the back end stack comprises conductive traces and vias electrically coupled to the first transistors. In an embodiment, the semiconductor device further comprises a second semiconductor layer over the back end stack, where the second semiconductor layer is a different semiconductor than the first semiconductor layer. In an embodiment, second transistors are fabricated in the second semiconductor layer.

A display device and a manufacturing method thereof are provided. The display device includes a display panel, a heat dissipation layer, and a chip on film. The heat dissipation layer is on a non-display side of the display panel and includes a driving circuit arranging region and a peripheral region. The heat dissipation layer located in at least a part of the driving circuit arranging region is insulated from the heat dissipation layer located in the peripheral region. The chip on film is on a side of the heat dissipation layer away from the display panel and is in the driving circuit arranging region.