Methods and systems for reducing electrical disturb effects between thyristor memory cells in a memory array are provided. Electrical disturb effects between cells are reduced by using a material having a reduced minority carrier lifetime as a cathode line that is embedded within the array. Disturb effects are also reduced by forming a potential well within a cathode line, or a one-sided potential barrier in a cathode line.

The present invention discloses a mixed three-dimensional memory (3D-M.sub.x). Both data and codes are stored in a same 3D-M.sub.x die. Data, which require a lower cost per bit and can tolerate slow access, are stored in large memory arrays, whereas codes, which require fast access and can tolerate a higher cost per bit, are stored in small memory arrays.

A semiconductor memory device according to one embodiment includes a stacked body, a semiconductor pillar and a plurality of charge storage films. The stacked body includes a plurality of electrode films and air gaps. The plurality of electrode films are disposed to be separated from each other along a first direction. Each of the air gaps is made between the electrode films. The semiconductor pillar extends in the first direction and pierces the stacked body. The plurality of charge storage films are provided between the semiconductor pillar and the plurality of electrode films. The plurality of charge storage films are partitioned every electrode film.

A magnetic memory includes: a magnetoresistance element; a conductive portion that is laminated on the magnetoresistance element; and a control portion configured to determine a driving temperature of the magnetoresistance element based on a change in a resistance value of the conductive portion and to control the amount of current applied to the magnetoresistance element.

A semiconductor device includes first and second active regions and a field insulating film contacting between the first and second active regions, and a gate electrode structure traversing the first and second active regions and the field insulating film, wherein the gate electrode structure includes a first portion positioned across the first active region and the field insulating film, a second portion positioned across the second active region and the field insulating film, and a third portion contacting the first and second portions. The gate electrode structure includes a gate electrode having an insertion film traversing the first and second active regions and the field insulating film second active region, and a filling film on the insertion film. A thickness of the gate electrode in the third portion is different from a thickness of the gate electrode in the first portion and the second portion.

Provided is a semiconductor device that can directly compare two negative potentials. The semiconductor device includes a first to a third transistor and a load and is configured to compare a first negative potential and a second negative potential. The first negative potential and the second negative potential are input to a gate of the first transistor and a gate of the second transistor, respectively. Each drain of the first transistor and the second transistor is electrically connected to the load. The third transistor serves as a current source. The first transistor and the second transistor each include a backgate. A positive potential is input to the backgates.

When forming a MISFET by replacing a dummy gate electrode with a metal gate electrode in a gate last process, formation caused by polishing of an interlayer insulation film of a silicide layer over an upper surface of the dummy gate electrode to result in hampering the removal of the dummy gate is prevented. In the gate last process, when an interlayer insulation film is polished to expose an upper surface of a dummy gate electrode, a slurry mixed with an acidic aqueous solution is used to prevent silicide layer formation over the upper surface of the dummy gate electrode.

The present invention discloses a Micro-Electro-Mechanical System (MEMS) acoustic pressure sensor device and a method for making same. The MEMS device includes: a substrate; a fixed electrode provided on the substrate; and a multilayer structure, which includes multiple metal layers and multiple metal plugs, wherein the multiple metal layers are connected by the multiple metal plugs. A cavity is formed between the multilayer structure and the fixed electrode. Each metal layer in the multilayer structure includes multiple metal sections. The multiple metal sections of one metal layer and those of at least another metal layer are staggered to form a substantially blanket surface as viewed from a moving direction of an acoustic wave.

A device and related method that provides a two-phase heat transfer device with a combination of enhanced evaporation and increase cooling capacity. A recess topology is used to increase suction of working fluid toward a heat source. A non-wetting coating or structure may be used to keep working fluid away from the spaces between elongated members of an evaporator and a wetting coating or structure may be used to form thin films of working fluid around the distal regions of elongated members. The devices and method described herein may be used to cool computer chips, the skin of a hypersonic flying object, a parabolic solar collector, a turbine engine blade, or other heat sources that require high heat flux.

A semiconductor device including: a first memory cell including a first transistor; and a second memory cell including a second transistor, where the second transistor overlays the first transistor and the second transistor is self-aligned to the first transistor, where access to the first memory cell is controlled by at least one junction-less transistor, and where the junction-less transistor is not part of the first memory cell and the second memory cell.