A differential amplifier generates an output voltage waveform exhibiting a slew rate over a rise time. The amplifier is powered from a dc voltage input and includes a set of differential pairs having a bias current flowing therethrough and a Miller compensation capacitance. A comparator functions to compare a voltage at the dc voltage input against a reference voltage in order to detect when the voltage drops below the reference voltage. A gain stage controls the gain of the differential amplifier and a bias current control circuit controls the bias current of the differential amplifier. In response to the detection by the comparator of the voltage dropping below the reference voltage, the gain stage and the bias current control circuit decrease the gain of the amplifier and jointly decrease the bias current in order to maintain a value of the rise time.

The present invention is directed to electrical circuits and techniques thereof. In various embodiments, the present invention provides a variable gain amplifier architecture that includes a continuous-time linear equalizer (CTLE) section and a variable gain amplifier (VGA) section. The CTLE section provides both a pair of equalized data signals and a common mode voltage. A DAC generates a control signal based on a control code. The VGA section amplifies the pair of equalized data signals by an amplification factor using a transistor whose resistance value is based on both the common mode voltage and the control signal. There are other embodiments as well.

A variable-gain power amplifying technique includes generating, with a network of one or more reactive components included in an oscillator, a first oscillating signal, and outputting, via one or more taps included in the network of the reactive components, a second oscillating signal. The second oscillating signal has a magnitude that is proportional to and less than the first oscillating signal. The power amplifying technique further includes selecting one of the first and second oscillating signals to use for generating a power-amplified output signal, and amplifying the selected one of the first and second oscillating signals to generate the power-amplified output signal.

In conventional optical receivers the dynamic range is obtained by using variable gain amplifiers (VGA) with a fixed trans-impedance amplifier (TIA) gain. To overcome the SNR problems inherent in conventional receivers an improved optical receiver comprises an automatic gain control loop for generating at least one gain control signal for controlling gain of both the VGA and the TIA. Ideally, both the resistance and the gain of the TIA are controlled by a gain control signal.

A circuit for calibrating an injection locked oscillator is provided. The injection locked oscillator includes an injection locking input, an LC tank and an oscillator output to output an oscillator output signal. The circuit is configured to adjust a capacitance of the LC tank to different values, detect an amplitude of the oscillator output signal for each value of the different values of the capacitance while an input signal having a target frequency is applied to the injection locking input, determine a maximum amplitude of the detected amplitudes, and select a value for operating the injection locked oscillator based on the determined maximum amplitude.

A power amplifier including a first transistor for amplifying and outputting a radio frequency signal, a second transistor, a third transistor for supplying a bias current, a first voltage supply circuit for supplying a lower voltage to a base of the third transistor as a temperature of a first diode is higher. The third transistor and the first transistor, or the third transistor and the second transistor, are disposed without another electronic element interposed therebetween. The third transistor is disposed such that a distance between the third transistor and the first transistor is smaller than a distance between the first voltage supply circuit and the first transistor, or a distance between the third transistor and the second transistor is smaller than a distance between the first voltage supply circuit and the second transistor.

Provided herein are apparatus and methods for a multi-stage signal-processing circuit. The signal-processing circuit can include multiple configurable stages that can be cascaded and configured to process an input signal. Control circuitry can be used to select an output of the configurable stages. Serial data can be recovered with good signal integrity using a signal monitor with the configurable stages by virtually placing the signal monitor on a buffered output node.

A transimpedance amplifier includes a variable gain circuit configured to generate a pair of complementary signals in accordance with an input signal and a reference signal. A first differential circuit of the variable gain circuit includes a first transistor including a control terminal to receive the input signal, a second transistor including a control terminal to receive the reference signal, and a variable resistance circuit including a first field effect transistor (FET) and a second FET. A first timing when a voltage of a first linearity adjustment signal input to the first FET reaches a first threshold voltage of the first FET and a second timing when a voltage of a second linearity adjustment signal input to the second FET reaches a second threshold voltage of the second FET are different from each other.

A programmable a fully-differential programmable gain amplifier for reducing distortion, switching transients and interference, and improving bandwidth. In one embodiment, the amplifier includes a programmable gain module, an amplifier coupled to the current mode outputs and a data latch circuit of the programmable gain module, the amplifier configured to apply common mode voltage to the data latch circuit, and a current-to-voltage converter. In one embodiment, the fully-differential programmable gain amplifier controls distortion and switching interference during amplification by sensing common mode signals to produce an error signal, and applying the resulting error signal to the programmable gain module for multiplying digital to analog conversion. Components of the fully-differential programmable gain amplifier provide compensation of distortion caused by nonlinearity of device switches and switch resistance, and can include a floating supply, galvanic isolation of control signals and a common mode voltage controller.

Apparatus and methods for envelope tracking systems with automatic mode selection are provided herein. In certain configurations, a power amplifier system includes a power amplifier configured to provide amplification to a radio frequency signal and to receive power from a power amplifier supply voltage, and an envelope tracker including a signal bandwidth detection circuit configured to generate a detected bandwidth signal based on processing an envelope signal corresponding to an envelope of the radio frequency signal. The envelope tracker further includes a switch bank configured to receive a plurality of regulated voltages, a filter configured to filter an output of the switch bank to generate the power amplifier supply voltage, and a mode control circuit configured to control a filtering characteristic of the filter based on the detected bandwidth signal.