Patent classifications
H03K3/00
IGBT gate drive circuit and method
There are provided methods and systems for operating insulated gate bipolar transistors (IGBTs). For example, there is provided a method that can include detecting a desaturation condition in an IGBT and initiating a turn off procedure when desaturation is detected. The turn off procedure can include holding a gate of the IGBT at at least one voltage level intermediate between a positive rail voltage and a negative rail voltage of an operational range of the IGBT.
Push-pull flipped-die half-bridge magnetoresistive switch
Push-pull half-bridge magnetoresistive switch, comprising two magnetic sensor chips, each magnetic sensor chip having a magnetic induction resistor and a magnetic induction resistor electrical connection pad. The two magnetic sensor chips are electrically interconnected and have opposite and parallel directions of induction, thus forming the push-pull half-bridge circuit. The magnetic induction resistor comprises one or a plurality of magnetoresistive elements connected in series. The magnetic induction resistor pads are located at adjacent edges of the magnetic sensor chips, and each pad may accommodate the welding of at least two bonding wires. The magnetoresistive switch may improve the sensitivity of a sensor, and decrease output voltage deviation and output voltage temperature drift, which is beneficial for decreasing the volume and increasing the performance of the switch sensor.
Skyrmion driving method and driving apparatus
A skyrmion driving method that utilizes electric current to make it possible to perform driving ON-OFF control at high speed and to suppress the influence of an inertial effect so that the driving control can be performed further logically. The skyrmion is driven based on a driving amount proportional to a time-integrated value of an electric current density j(t) (Am.sup.−2) at a clock time t for a location R(t) of the skyrmion at the clock time t and on a driving amount that is in accordance with a diffusive motion due to thermal fluctuation and increases as a Gilbert attenuation constant increases.
Electronic control apparatus
An electronic control apparatus that controls actuation of an inductive load includes: a current detector that detect current flowing through the inductive load and outputs a current detection signal in an analog signal; an analog-digital converter that takes in the current detection signal at a fetch timing, and converts the current detection signal into a current detection value; and a controller that calculates a current arithmetic value by executing arithmetic processing for the current detection value, and controls the current based on the current arithmetic value. The controller obtains a sample data value of the current arithmetic value for each of a plurality of fetch timings. The controller calculates a deflection between an ideal value of the current arithmetic value and the sample data value of the current arithmetic value, and learns the fetch timing, causing the deflection with the ideal value of the current arithmetic value to be minimized.
Switching circuit
Embodiments of the present invention provide a switching circuit. The circuit comprises: a charging sub-circuit, which has a first input end and an output end; a switching sub-circuit, which has a first end, a second end, and a control end, wherein the control end of the switching sub-circuit is connected to the output end of the charging sub-circuit; and a function sub-circuit, which is connected to the first end or the second end of the switching sub-circuit, and has a first node, wherein an operating voltage of the first node is higher than an input voltage of an input power supply, the switching sub-circuit comprises one or more NMOS switches, and the first input end of the charging sub-circuit is connected to the first node.
Circuit and method of operating circuit
A circuit includes a first switch, a second switch, a first delay circuit and a second delay circuit. The first switch includes a first terminal, and the second switch includes a second terminal. The first delay circuit is coupled to the first terminal and the second terminal. The first delay circuit is configured to alternately turn ON the first switch and the second switch in accordance with an input signal and with a delay between successive ON times of the first switch and the second switch. The second delay circuit is coupled to the first terminal and the second terminal. The second delay circuit is configured to control the first delay circuit to generate the delay in accordance with a stored setting of the delay, a first voltage on the first terminal, or a second voltage on the second terminal.
Hybrid switch including GaN HEMT and MOSFET
A hybrid switch apparatus includes a gate drive circuit producing a gate drive signal, a GaN high electron mobility transistor (HEMT) having a first gate, a first drain, and a first source. A silicon (Si) MOSFET has a second gate, a second drain, and a second source. The GaN HEMT and the Si MOSFET are connected in a parallel arrangement so that (i) the first drain and the second drain are electrically connected and (ii) the first source and the second source are electrically connected. The second gate is connected to the gate drive circuit output to receive the gate drive signal. A delay block has an input connected to the gate drive circuit output and an delay block output is configured to produce a delayed gate drive signal for driving the GaN HEMT.
Systems and methods for mitigating noise in an electronic device
A method and apparatus for mitigating electromagnetic noise in an electronic device. The method includes generating a trigger clock signal at a first frequency, and generating a second clock signal at a second frequency. The second frequency is higher than the first frequency. The method also includes receiving an input signal with a converter circuit, detecting an event based on the trigger clock signal, and predicting a time for a conversion of the input signal based on the detected event. The method further includes blanking the second clock signal for a predetermined period based on the predicted time for a conversion.
Isolated uni-polar transistor gate drive
According to one aspect, a transistor gate drive comprises a first input configured to be coupled to a DC voltage source, a second input configured to receive a control signal, a third input configured to couple to a ground connection, a transformer, a first switch configured to couple the first input to a first end of a primary winding of the transformer in response to receipt of the control signal, and to decouple the first input from the first end of the primary winding in response to the receipt of the control signal, a second switch configured to couple a second end of the primary winding to the third input in response to receipt of the control signal, and to decouple the second end of the primary winding from the third input in response to the receipt of the control signal.
Gate driver
In a gate driver for driving a first transistor, the gate driver includes first, second and third push-pull circuits, in each of the push-pull circuits, two transistors are connected in series, an output terminal of the first push-pull circuit is connected to the gate of the first transistor, an output terminal of the second push-pull circuit is connected to the gate of a second transistor included in the first push-pull circuit and an output terminal of the third push-pull circuit is connected to the gate of a third transistor included in the first push-pull circuit.