Patent classifications
B81B7/00
INTEGRATED CIRCUIT PACKAGE WITH WARPAGE CONTROL USING CAVITY FORMED IN LAMINATED SUBSTRATE BELOW THE INTEGRATED CIRCUIT DIE
A support substrate includes an insulating core layer, an electrically conductive layer over the insulating core layer and a solder mask layer over the electrically conductive layer. A back side of an integrated circuit chip is mounted to an upper surface of the support substrate at a die attach location. The upper surface of the support substrate includes a cavity located within the die attach location, where the cavity extends under the back side of the integrated circuit chip. The cavity is defined by an area where the solder mask layer and at least a portion of the electrically conductive layer have been removed. Bonding wires connect connection pads on a front side of the integrated circuit chip to connection pad on the upper surface of the support substrate.
Wafer level package for device
According to an example aspect of the present invention, there is provided a wafer level package for a device, the package comprising: a first substrate and a second substrate, a sealing structure comprising a seal ring and a bonding layer between the first substrate and the second substrate, and a lateral electrical connection line on a surface of the first substrate, which lateral electrical connection line extends through the seal ring for creating an electrical connection between the device inside the package and an electrical circuit outside the package.
MONOCRYSTALLINE NICKEL-TITANIUM FILMS ON SINGLE CRYSTAL SILICON SUBSTRATES USING SEED LAYERS
A method of forming a monocrystalline nitinol film on a single crystal silicon wafer can comprise depositing a first seed layer of a first metal on the single crystal silicon wafer, the first seed layer growing epitaxially on the single crystal silicon wafer in response to the depositing the first seed layer of the first metal; and depositing the monocrystalline nitinol film on a final seed layer, the monocrystalline nitinol film growing epitaxially on the final seed layer in response to the depositing the monocrystalline nitinol film. The method can form a multilayer stack for a micro-electromechanical system MEMS device.
MEMS pressure sensor
The present invention provides a MEMS pressure sensor and a manufacturing method. The pressure is formed by a top cap wafer, a MEMS wafer and a bottom cap wafer. The MEMS wafer comprises a frame and a membrane, the frame defining a cavity. The membrane is suspended by the frame over the cavity. The bottom cap wafer closes the cavity. The top cap wafer has a recess defining with the membrane a capacitance gap. The top cap wafer comprises a top cap electrode located over the membrane and forming, together with the membrane, a capacitor to detect a deflection of the membrane. Electrical contacts on the top cap wafer are connected to the top cap electrode. A vent extends from outside of the sensor into the cavity or the capacitance gap. The pressure sensor can include two cavities and two capacitance gaps to form a differential pressure sensor.
METHOD AND SYSTEM FOR FABRICATING A MEMS DEVICE CAP
A device includes a substrate comprising a first standoff, a second standoff, a third standoff, a first cavity, a second cavity, and a bonding material covering a portion of the first, the second, and the third standoff. The first cavity is positioned between the first and the second standoffs, and the second cavity is positioned between the second and the third standoffs. The first cavity comprises a first cavity region and a second cavity region separated by a portion of the substrate extruding thereto, and wherein a depth associated with the first cavity region is greater than a depth associated with the second cavity. A surface of the first cavity is covered with a getter material.
PRESSURE SENSOR ASSEMBLY
In the following, a sensor assembly is described. According to an exemplary embodiment, the sensor assembly has a housing enclosing a pressure chamber filled with a medium, the housing having a first housing part and a second housing part, the first housing part being connected to the second housing part to seal the pressure chamber in a pressure-tight manner A sensor chip is arranged in the pressure chamber, substantially surrounded by the medium, and configured to measure a pressure of the medium. The sensor assembly also includes a plurality of connection pins which are fed through the first housing part (carrier) by pressure-tight bushings and which are electrically connected to the sensor chip. The sensor assembly also has stress relieving structures which are configured to mechanically decouple the first housing part and a pressure-sensitive element of the sensor chip.
BOND WAVE OPTIMIZATION METHOD AND DEVICE
A semiconductor device and method of manufacturing the device that includes a growth die and a dummy die. The method includes patterning, on an integrated circuit wafer, at one least growth die, and patterning at least one dummy die that is positioned on at least a portion of a circumference of the integrated circuit wafer. The patterned growth and dummy dies are etched on the wafer. A bond wave is initiated at a starting point on the integrated circuit wafer. The starting point is positioned on an edge of the integrated circuit wafer opposite the portion on which the at least one dummy die is patterned. Upon application of pressure at the starting point, a uniform bond wave propagates across the wafers, bonding the two wafers together.
Miniaturized vacuum package and methods of making same
The present disclosure relates to an integrated package having an active area, an electrical routing circuit, an optical routing circuit, and a vacuum vessel. Methods of making such a package are also described herein.
Enhanced microfabrication using electrochemical techniques
A method is provided for subtractively processing a layer of etchable material formed over an electrically conductive surface region of a workpiece. The workpiece is immersed in a liquid solution, generally but not exclusively a conductive solution, that comprises an etchant for the etchable material, so that etching of the etchable material is initiated. An electric circuit is connected to include a control electrode, a reference electrode, and the electrically conductive surface region of the workpiece. The electric circuit is used to monitor the development process dynamically at each of a plurality of intervals during the etching. The etching is terminated when the electrochemical signal satisfies a criterion indicating that the etching is complete.
MEMs device and electronic device
An MEMS device includes: a first member; a second member forming a sealed space with the first member therebetween; and a third member disposed between the first member and the second member and joined to the first member and the second member, in which the third member has lower rigidity than rigidity of the first member and the second member, and the third member is provided with a communication portion that establishes communication between the sealed space and an external space.