Patent classifications
B81C1/00
Wafer level package for device
According to an example aspect of the present invention, there is provided a wafer level package for a device, the package comprising: a first substrate and a second substrate, a sealing structure comprising a seal ring and a bonding layer between the first substrate and the second substrate, and a lateral electrical connection line on a surface of the first substrate, which lateral electrical connection line extends through the seal ring for creating an electrical connection between the device inside the package and an electrical circuit outside the package.
METHOD FOR MANUFACTURING CORE-SHELL NANOWIRE AND NANOWIRE MANUFACTURED THEREBY
Provided is a method of fabricating a core-shell structured nanowire on a tip of an optical fiber, on a substrate, or any position on other target objects, and a nanowire fabricated by the method. The nanowire fabricated by the method of the present invention may be used for a drug delivery system, a sensor, an optical waveguide, and the like.
LARGE-SCALE PLASMONIC HYBRID FRAMEWORK WITH BUILT-IN NANOHOLE ARRAYS AS MULTIFUNCTIONAL OPTICAL SENSING PLATFORMS
A nanohole template is disclosed which includes a substrate and a vertically aligned nanocomposite (VAN) structure disposed over the substrate. The VAN structure is a metal nitride having circular periodic nanoholes of about 2 nm to about 20 nm in diameter.
MONOCRYSTALLINE NICKEL-TITANIUM FILMS ON SINGLE CRYSTAL SILICON SUBSTRATES USING SEED LAYERS
A method of forming a monocrystalline nitinol film on a single crystal silicon wafer can comprise depositing a first seed layer of a first metal on the single crystal silicon wafer, the first seed layer growing epitaxially on the single crystal silicon wafer in response to the depositing the first seed layer of the first metal; and depositing the monocrystalline nitinol film on a final seed layer, the monocrystalline nitinol film growing epitaxially on the final seed layer in response to the depositing the monocrystalline nitinol film. The method can form a multilayer stack for a micro-electromechanical system MEMS device.
Method for forming semiconductor device
A method for forming a MEMS device includes following operations. A first semiconductor layer is formed over a substrate. A plurality of first pillars are formed over the first layer. A second layer is formed over the first pillars and the first layer. A plurality of second pillars are formed over the second layer. A third layer is formed over the second pillars and the second layer.
MEMS pressure sensor
The present invention provides a MEMS pressure sensor and a manufacturing method. The pressure is formed by a top cap wafer, a MEMS wafer and a bottom cap wafer. The MEMS wafer comprises a frame and a membrane, the frame defining a cavity. The membrane is suspended by the frame over the cavity. The bottom cap wafer closes the cavity. The top cap wafer has a recess defining with the membrane a capacitance gap. The top cap wafer comprises a top cap electrode located over the membrane and forming, together with the membrane, a capacitor to detect a deflection of the membrane. Electrical contacts on the top cap wafer are connected to the top cap electrode. A vent extends from outside of the sensor into the cavity or the capacitance gap. The pressure sensor can include two cavities and two capacitance gaps to form a differential pressure sensor.
Manufacturing method of micro fluid actuator
A manufacturing method of micro fluid actuator includes: providing a substrate; depositing a first protection layer on a first surface of the substrate; depositing an actuation region on the first protection layer; applying lithography dry etching to a portion of the first protection layer to produce at least one first protection layer flow channel; applying wet etching to a portion of a main structure of the substrate to produce a chamber body and a first polycrystalline silicon flow channel region, while a region of an oxidation layer middle section of the main structure is not etched; applying reactive-ion etching to a portion of a second surface of the substrate to produce at least one substrate silicon flow channel; and applying dry etching to a portion of a silicon dioxide layer to produce at least one silicon dioxide flow channel.
Method and system for fabricating glass-based nanostructures on large-area planar substrates, fibers, and textiles
A method for manufacturing glass-based micro- and nanostructure comprising the step of dewetting a thin-film glass layer on a textured substrate to form the micro- and nanostructure from the thin-film glass layer.
ELECTROSTATICALLY GATED NANOFLUIDIC MEMBRANES FOR CONTROL OF MOLECULAR TRANSPORT
Devices and methods for controlling molecular transport are disclosed herein. The devices include a membrane having a plurality of nanochannels extending therethrough. The membrane has an inner electrically conductive layer and an outer dielectric layer. The outer dielectric layer creates an insulative barrier between the electrically conductive layer and the contents of the nanochannels. At least one electrical contact region is positioned on a surface of the membrane. The electrical contact region exposes the electrically conductive layer of the membrane for electrical coupling to external electronics. When the membrane is at a first voltage, molecules flow through the nanochannels at a first release rate. When the membrane is at a second voltage, charge accumulation within the nanochannels modulates the flow of molecules through the nanochannels to a second release rate that is different than the first release rate. Methods of fabricating devices for controlling molecular transport are also disclosed herein.
METHOD AND SYSTEM FOR FABRICATING A MEMS DEVICE CAP
A device includes a substrate comprising a first standoff, a second standoff, a third standoff, a first cavity, a second cavity, and a bonding material covering a portion of the first, the second, and the third standoff. The first cavity is positioned between the first and the second standoffs, and the second cavity is positioned between the second and the third standoffs. The first cavity comprises a first cavity region and a second cavity region separated by a portion of the substrate extruding thereto, and wherein a depth associated with the first cavity region is greater than a depth associated with the second cavity. A surface of the first cavity is covered with a getter material.