H03F3/00

DYNAMIC CURRENT LIMIT FOR OPERATIONAL AMPLIFIER

An output stage of an operational amplifier includes a low voltage (LV) metal oxide semiconductor (MOS) device and a dynamic current limit circuit. An output current of the operational amplifier flows through the LV MOS device. The dynamic current limit circuit is configured to sense a drain voltage of the LV MOS device and increase a clamping voltage for the LV MOS device when the drain voltage of the LV MOS device is less than a threshold voltage.

System and method of generating phonons

Systems and methods are disclosed for controlling nonequilibrium electron transport process and generating phonons in low dimensional materials. The systems can include a conductive sheet sandwiched between a first insulation layer and a second insulation layer; a first electrode conductively coupled to a first end of the conductive sheet; a second electrode conductively coupled to a second end of the conductive sheet; and a current source conductively coupled to the first electrode and the second electrode and configured to pass a current from the first electrode through the conductive sheet to the second electrode such that current generates a drift velocity of electrons in the conductive sheet that is greater than the speed of sound to generate phonons.

System and method of generating phonons

Systems and methods are disclosed for controlling nonequilibrium electron transport process and generating phonons in low dimensional materials. The systems can include a conductive sheet sandwiched between a first insulation layer and a second insulation layer; a first electrode conductively coupled to a first end of the conductive sheet; a second electrode conductively coupled to a second end of the conductive sheet; and a current source conductively coupled to the first electrode and the second electrode and configured to pass a current from the first electrode through the conductive sheet to the second electrode such that current generates a drift velocity of electrons in the conductive sheet that is greater than the speed of sound to generate phonons.

BOOSTER STAGE CIRCUIT FOR POWER AMPLIFIER
20220416724 · 2022-12-29 · ·

The present invention is in the field of booster stage circuit for a power amplifier, and an external supply voltage power amplifier comprising said booster stage circuit, such as for amplifying an electronic signal to a speaker system. These amplifiers may be provided with an external supply voltage.

Floating inverter amplifier device

An exemplary system and method is disclosed employing a floating inverter amplifier comprising an inverter-based circuit comprising an input configured to be switchable between a floating reservoir capacitor during a first phase of operation and to a device power source during a second phase of operation. In some embodiments, the floating inverter amplifier is further configured for current reuse and dynamic bias. In other embodiments, the floating inverter amplifier is further configured with a dynamic cascode mechanism that does not need any additional bias voltage. The dynamic cascode mechanism may be used in combination with 2-step fast-settling operation to provide high-gain and high-speed noise suppression operation.

DC-BLOCKING AMPLIFIER WITH ALIASING TONE CANCELLATION CIRCUIT
20220407476 · 2022-12-22 · ·

The present invention provides an amplifier circuit, wherein the amplifier circuit includes an input terminal, a capacitor, an amplifier, a feedback circuit and an aliasing tone cancellation circuit. The input terminal is configured to receive a first input signal. The capacitor is coupled to the input terminal. The amplifier is configured to receive the input signal through the capacitor to generate an output signal. The feedback circuit is coupled between an input node and an output node of the amplifier, and is configured to generate a feedback signal according to the output signal, wherein the feedback circuit includes a storage block including a switched-capacitor. The aliasing tone cancellation circuit is coupled between the input terminal of the amplifier circuit and the input node of the amplifier, and configured to generate a signal to cancel or reduce an aliasing tone of the feedback signal according to the input signal.

Switched capacitor amplifying apparatus and method having gain adjustment mechanism
20220407475 · 2022-12-22 ·

The present invention discloses a switched capacitor amplifying apparatus having gain adjustment mechanism. An amplifier includes an input terminal and an output terminal. A capacitor circuit includes a sampling capacitor circuit, a load capacitor and a level-shifting capacitor array. The sampling capacitor circuit includes two sampling input terminals and a sampling output terminal to receive an input signal from a signal input terminal and output a sampled result to the input terminal of the amplifier. The load capacitor and the level-shifting capacitor array are charged according to the output terminal of the amplifier and the load capacitor is subsequently charged by the level-shifting capacitor array to accomplish level-shifting such that the load capacitor generates an output signal through a signal output terminal. A control circuit determines an enabling combination of level-shifting capacitors included in the level-shifting capacitor array to determine an equivalent capacitance, to further determine a loop gain.

Switched capacitor amplifier apparatus and switched capacitor amplifying method for improving level-shifting
20220399858 · 2022-12-15 ·

The present disclosure discloses a switched capacitor amplifier apparatus for improving level-shifting. An amplifier includes input terminals and output terminals. Two capacitor circuits correspond to signal input terminals and signal output terminals and each includes a sampling capacitor circuit, a load capacitor and a level-shifting capacitor. The sampling capacitor circuit samples an input signal from one of the signal input terminals to one of the input terminals. An electrical charge neutralizing capacitor is coupled between the output terminals. The load capacitor and the level-shifting capacitor are charged according to an output from one of the output terminals in an estimation period. The level-shifting capacitor charges the load capacitor in a level-shifting period to generate an output signal at one of the signal output terminals. The electrical charge neutralizing capacitor receives and provides electrical charges from the output terminals to the level-shifting capacitor respectively in the estimation period and the level-shifting period.

Signal amplifiers that switch to an attenuated or alternate communications path in response to a power interruption

RF signal amplifiers are provided that include an RF input port, one or more active RF output ports, one or more passive RF output ports, an active communication path, and a passive communication path. Various embodiments include one or more switching devices, one or more directional couplers, one or more diplexers, a power divider network, and/or an attenuator.

Signal amplifiers that switch to an attenuated or alternate communications path in response to a power interruption

RF signal amplifiers are provided that include an RF input port, one or more active RF output ports, one or more passive RF output ports, an active communication path, and a passive communication path. Various embodiments include one or more switching devices, one or more directional couplers, one or more diplexers, a power divider network, and/or an attenuator.