Time folding power combining circuits convert a continuous wave into a pulsed wave of greater peak power. Such a circuit may comprise: a switch which receives a continuous wave signal as input, and outputs first and second pulsed wave signals along first and second signal paths, respectively, said switch being configured to repeatedly switch connection back and forth between the input and the outputs of the first and second signal paths in a plurality of time frames; a delay line in the second signal path configured to introduce a time delay to the second pulsed wave signal in the second signal path such that the first pulsed wave signal in the first signal path and the time-delayed second pulsed wave signal in the second signal path substantially align in the same time frames; and a combiner, which receives the first pulsed wave signal in the first signal path and the time-delayed pulsed second wave signal in the second signal path as inputs, and combines them into a single combined pulsed wave signal as output.

Time folding power combining circuits convert a continuous wave into a pulsed wave of greater peak power. Such a circuit may comprise: a switch which receives a continuous wave signal as input, and outputs first and second pulsed wave signals along first and second signal paths, respectively, said switch being configured to repeatedly switch connection back and forth between the input and the outputs of the first and second signal paths in a plurality of time frames; a delay line in the second signal path configured to introduce a time delay to the second pulsed wave signal in the second signal path such that the first pulsed wave signal in the first signal path and the time-delayed second pulsed wave signal in the second signal path substantially align in the same time frames; and a combiner, which receives the first pulsed wave signal in the first signal path and the time-delayed pulsed second wave signal in the second signal path as inputs, and combines them into a single combined pulsed wave signal as output.

A waveform conversion unit (42) of a numerically controlled oscillator has a cosine table (101) and a sine table (102) in which parameters for cosine wave and sine wave signal generation are stored, a correction mechanism (50) for generating correction values according to the phase of an inputted phase signal, an adder (111) for generating a cosine wave signal from a parameter in the cosine table (101) and a correction value, and an adder (112) for generating a sine wave signal from a parameter in the sine table (102) and a correction value. The correction mechanism (50) uses waveform data which is a kind of parabolic data and whose phase interval is more minute than the phase interval of the parameters in each table (101), (102) to generate correction values for correcting cosine wave and sine wave signals to be found by linear interpolation.

A waveform conversion unit (42) of a numerically controlled oscillator has a cosine table (101) and a sine table (102) in which parameters for cosine wave and sine wave signal generation are stored, a correction mechanism (50) for generating correction values according to the phase of an inputted phase signal, an adder (111) for generating a cosine wave signal from a parameter in the cosine table (101) and a correction value, and an adder (112) for generating a sine wave signal from a parameter in the sine table (102) and a correction value. The correction mechanism (50) uses waveform data which is a kind of parabolic data and whose phase interval is more minute than the phase interval of the parameters in each table (101), (102) to generate correction values for correcting cosine wave and sine wave signals to be found by linear interpolation.

Systems and devices are provided to perform low-power digital filtering of sensor or other data based on bitwise operations. A reference sinusoid is encoded via a plurality of pulse trains, such that each pulse train includes a number of pulses n representing a value of the reference sinusoid out of a maximum possible pulses corresponding to an encoding quantization level. A circular register stores a representation of the encoded sinusoid. A set of multiple logical gate blocks are configured to multiply, via one or more bitwise operations, each of multiple bits of a received input signal with a pulse train corresponding to a value of the encoded sinusoid. A logic circuit coupled to the circular register and the set of multiple logical gate blocks is configured to generate, based on the encoded sinusoid and on the input signal, an output signal indicating an approximate value of the received input signal multiplied by the encoded sinusoid.

Systems and devices are provided to perform low-power digital filtering of sensor or other data based on bitwise operations. A reference sinusoid is encoded via a plurality of pulse trains, such that each pulse train includes a number of pulses n representing a value of the reference sinusoid out of a maximum possible pulses corresponding to an encoding quantization level. A circular register stores a representation of the encoded sinusoid. A set of multiple logical gate blocks are configured to multiply, via one or more bitwise operations, each of multiple bits of a received input signal with a pulse train corresponding to a value of the encoded sinusoid. A logic circuit coupled to the circular register and the set of multiple logical gate blocks is configured to generate, based on the encoded sinusoid and on the input signal, an output signal indicating an approximate value of the received input signal multiplied by the encoded sinusoid.

Systems and devices are provided to perform low-power digital filtering of sensor or other data based on bitwise operations. A reference sinusoid is encoded via a plurality of pulse trains, such that each pulse train includes a number of pulses n representing a value of the reference sinusoid out of a maximum possible pulses corresponding to an encoding quantization level. A circular register stores a representation of the encoded sinusoid. A set of multiple logical gate blocks are configured to multiply, via one or more bitwise operations, each of multiple bits of a received input signal with a pulse train corresponding to a value of the encoded sinusoid. A logic circuit coupled to the circular register and the set of multiple logical gate blocks is configured to generate, based on the encoded sinusoid and on the input signal, an output signal indicating an approximate value of the received input signal multiplied by the encoded sinusoid.

Systems and devices are provided to perform low-power digital filtering of sensor or other data based on bitwise operations. A reference sinusoid is encoded via a plurality of pulse trains, such that each pulse train includes a number of pulses n representing a value of the reference sinusoid out of a maximum possible pulses corresponding to an encoding quantization level. A circular register stores a representation of the encoded sinusoid. A set of multiple logical gate blocks are configured to multiply, via one or more bitwise operations, each of multiple bits of a received input signal with a pulse train corresponding to a value of the encoded sinusoid. A logic circuit coupled to the circular register and the set of multiple logical gate blocks is configured to generate, based on the encoded sinusoid and on the input signal, an output signal indicating an approximate value of the received input signal multiplied by the encoded sinusoid.

[Issue] To provide a small size, low cost AC input/DC output power supply capable of supplying both a DC voltage and a high-precision clock signal.

[Solution] An AC input/DC output power supply of the present invention includes: a voltage conversion means for taking an AC voltage as input and generating a secondary voltage, splitting the secondary voltage into a first secondary AC voltage and a second secondary AC voltage, and outputting the first and second secondary voltages; a DC voltage generation means for receiving the first secondary AC voltage and outputting a predetermined DC voltage; a waveform shaping means for receiving the second secondary AC voltage and outputting a square wave voltage signal; and a frequency adjustment means for adjusting a frequency of the square wave voltage signal to be a predetermined frequency, and thereby outputting a clock signal.

[Issue] To provide a small size, low cost AC input/DC output power supply capable of supplying both a DC voltage and a high-precision clock signal.

[Solution] An AC input/DC output power supply of the present invention includes: a voltage conversion means for taking an AC voltage as input and generating a secondary voltage, splitting the secondary voltage into a first secondary AC voltage and a second secondary AC voltage, and outputting the first and second secondary voltages; a DC voltage generation means for receiving the first secondary AC voltage and outputting a predetermined DC voltage; a waveform shaping means for receiving the second secondary AC voltage and outputting a square wave voltage signal; and a frequency adjustment means for adjusting a frequency of the square wave voltage signal to be a predetermined frequency, and thereby outputting a clock signal.