A qubit array reparation system includes a reservoir of ultra-cold particle, a detector that determines whether or not qubit sites of a qubit array include respective qubit particles, and a transport system for transporting an ultra-cold particle to a first qubit array site that has been determined by the probe system to not include a qubit particle so that the ultra-cold particle can serve as a qubit particle for the first qubit array site. A qubit array reparation process includes maintaining a reservoir of ultra-cold particles, determining whether or not qubit-array sites contain respective qubit particles, each qubit particle having a respective superposition state, and, in response to a determination that a first qubit site does not contain a respective qubit particle, transporting an ultracold particle to the first qubit site to serve as a qubit particle contained by the first qubit site.

A resistive memory device is provided. The resistive memory device comprises a first metal oxide layer above a body electrode. A correlated electron layer located between a source and a drain and above the first metal oxide layer. A gate above a bottom portion of the correlated electron layer.

A semiconductor solid state battery has an insulating layer provided between an N-type semiconductor and a P-type semiconductor. The first insulating layer preferably has a thickness of 3 nm to 30 μm and a dielectric constant of 10 or less. The first insulating layer preferably has a density of 60% or more of a bulk body. The semiconductor layer preferably has a capture level introduced. The semiconductor solid state battery can eliminate leakage of an electrolyte solution.

Surface supported quantum wells with a confined surface state capture and stably confine neutral atoms and molecules in a nanometer precise environment. Depending on the physico-chemical conditions in the capturing process, the degree of occupancy, the temperature of the solid substrate, and/or the history of external stimuli like electromagnetic field pulses, these atoms, molecules or clusters assume unique configurations. The atoms or molecules are able to remain coupled to the quantum-well specific electronic state in the confinement and as such exhibit local and delocalized quantum entanglement. The capturing potential arises from the superposition of Pauli repulsion between the captured object and the quantum well-specific confined electronic state. This occurs within on-surface atomic or supramolecular assemblies or surface supported coordination or covalent networks.

A photon emitter includes a multi-layer film. The multi-layer film includes a first material layer and a second material layer, and the multi-layer film includes an interface surface between the first and second material layers. The first material layer includes silicon nitride. The multi-layer film is formed by positioning the silicon nitride over the second material layer and energetically activating the combination of the first material layer and the second material layer. The interface surface is operable to emit single photons.

A resistive memory device is provided. The resistive memory device comprises a first metal oxide layer above a body electrode. A correlated electron layer located between a source and a drain and above the first metal oxide layer. A gate above a bottom portion of the correlated electron layer.

Embodiments of the invention include metal oxide metal field effect transistors (MOMFETs) and methods of making such devices. In embodiments, the MOMFET device includes a source and a drain with a channel disposed between the source and the drain. According to an embodiment, the channel has at least one confined dimension that produces a quantum confinement effect in the channel. In an embodiment, the MOMFET device also includes a gate electrode that is separated from the channel by a gate dielectric. According to embodiments, the band-gap energy of the channel may be modulated by changing the size of the channel, the material used for the channel, and/or the surface termination applied to the channel. Embodiments also include forming an type device and a P-type device by controlling the work-function of the source and drain relative to the conduction band and valance band energies of the channel.

Certain aspects relate to wafer level optical designs for a folded optic stereoscopic imaging system. One example folded optical path includes first and second reflective surfaces defining first, second, and third optical axes, and where the first reflective surface redirects light from the first optical axis to the second optical axis and where the second reflective surface redirects light from the second optical axis to the third optical axis. Such an example folded optical path further includes wafer-level optical stacks providing ten lens surfaces distributed along the first and second optical axes. A variation on the example folded optical path includes a prism having the first reflective surface, wherein plastic lenses are formed in or secured to the input and output surfaces of the prism in place of two of the wafer-level optical stacks.

Certain aspects relate to systems and techniques for folded optic stereoscopic imaging, wherein a number of folded optic paths each direct a different one of a corresponding number of stereoscopic images toward a portion of a single image sensor. Each folded optic path can include a set of optics including a first light folding surface positioned to receive light propagating from a scene along a first optical axis and redirect the light along a second optical axis, a second light folding surface positioned to redirect the light from the second optical axis to a third optical axis, and lens elements positioned along at least the first and second optical axes and including a first subset having telescopic optical characteristics and a second subset lengthening the optical path length. The sensor can be a three-dimensionally stacked backside illuminated sensor wafer and reconfigurable instruction cell array processing wafer that performs depth processing.

The forming voltage of a resistance change element used in a non-volatile memory and the like is decreased, and repetition characteristics are improved. In an element structure in which a metal oxide film 12 is sandwiched between a lower electrode 11 and an upper electrode 14, an island/particle-like region of amorphous aluminum oxide or aluminum oxycarbide 13 is formed on the metal oxide film 12. Because an oxide deficiency, serving as the nucleus of a filament for implementing an on/off operation of the resistance change element, is formed from the beginning under the island- or particle-like aluminum oxide or the like, the conventional creation of an oxide deficiency by high-voltage application in the initial period of forming can be eliminated. Such a region can be fabricated using a small number of cycles of an ALD process.