Patent classifications
C30B29/36
SiC ingot forming method
An SiC ingot forming method includes: a holding step of holding by a chuck table a cut section of a primitive SiC ingot cut from an SiC ingot growth base; a planarization step of grinding an end surface of the primitive SiC ingot held by the chuck table, to planarize the end surface; a c-plane detection step of detecting a c-plane of the primitive SiC ingot from the planarized end surface; a first end surface forming step of grinding the planarized end surface, to form a first end surface inclined at an off angle relative to the c-plane; and a second end surface forming step of holding the first end surface by the chuck table and grinding the cut section of the primitive SiC ingot in parallel to the first end surface, to form a second end surface.
SiC ingot forming method
An SiC ingot forming method includes: a holding step of holding by a chuck table a cut section of a primitive SiC ingot cut from an SiC ingot growth base; a planarization step of grinding an end surface of the primitive SiC ingot held by the chuck table, to planarize the end surface; a c-plane detection step of detecting a c-plane of the primitive SiC ingot from the planarized end surface; a first end surface forming step of grinding the planarized end surface, to form a first end surface inclined at an off angle relative to the c-plane; and a second end surface forming step of holding the first end surface by the chuck table and grinding the cut section of the primitive SiC ingot in parallel to the first end surface, to form a second end surface.
Epitaxy substrate and method of manufacturing the same
An epitaxy substrate and a method of manufacturing the same are provided. The epitaxy substrate includes a silicon substrate and a silicon carbide layer. The silicon substrate has a first surface and a second surface opposite to each other, and the first surface is an epitaxy surface. The silicon carbide layer is located in the silicon substrate, and a distance between the silicon carbide layer and the first surface is between 100 angstroms (Å) and 500 angstroms.
SILICON CARBIDE SUBSTRATE AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE
A ratio obtained by dividing a number of pits by a number of screw dislocations is equal to or smaller than 1%. The first main surface has a surface roughness equal to or smaller than 0.15 nm. An absolute value of a difference between the first wave number and the second wave number is equal to or smaller than 0.2 cm.sup.−1, and an absolute value of a difference between the first full width at half maximum and the second full width at half maximum is equal to or smaller than 0.25 cm.sup.−1.
SILICON CARBIDE SUBSTRATE AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE
A ratio obtained by dividing a number of pits by a number of screw dislocations is equal to or smaller than 1%. The first main surface has a surface roughness equal to or smaller than 0.15 nm. An absolute value of a difference between the first wave number and the second wave number is equal to or smaller than 0.2 cm.sup.−1, and an absolute value of a difference between the first full width at half maximum and the second full width at half maximum is equal to or smaller than 0.25 cm.sup.−1.
SILICON CARBIDE WAFER AND SEMICONDUCTOR DEVICE
A silicon carbide wafer has one surface and the other surface opposite to the one surface. An average Rmax roughness of the one surface is 2.0 nm or less, and an average Ra roughness of the one surface is 0.1 nm or less. An edge region is a region in which a distance from an edge of the silicon carbide wafer toward a center is 5% to 75% of a radius of the silicon carbide wafer, and a central region is a region having a radius of 25% of the radius of the silicon carbide wafer at the center of the silicon carbide wafer. A difference between an average Rmax roughness of the edge region of the one surface and an average Rmax roughness of the central region of the one surface is 0.01 nm to 0.5 nm.
SILICON CARBIDE WAFER AND SEMICONDUCTOR DEVICE
A silicon carbide wafer has one surface and the other surface opposite to the one surface. An average Rmax roughness of the one surface is 2.0 nm or less, and an average Ra roughness of the one surface is 0.1 nm or less. An edge region is a region in which a distance from an edge of the silicon carbide wafer toward a center is 5% to 75% of a radius of the silicon carbide wafer, and a central region is a region having a radius of 25% of the radius of the silicon carbide wafer at the center of the silicon carbide wafer. A difference between an average Rmax roughness of the edge region of the one surface and an average Rmax roughness of the central region of the one surface is 0.01 nm to 0.5 nm.
REDUCED OPTICAL ABSORPTION FOR SILICON CARBIDE CRYSTALLINE MATERIALS
Silicon carbide (SiC) crystalline materials and related methods are disclosed that provide SiC crystalline materials with reduced optical absorption. In certain aspects, SiC crystalline materials with reduced absorption coefficients for wavelengths of light within the visible spectrum are disclosed. Various peaks in absorption over a wavelength spectrum may be reduced in SiC crystalline materials to improve overall absorption coefficient uniformity across the visible spectrum. By providing such improvements in absorption coefficients for SiC crystalline materials, reduced reflection and transmission losses of light in corresponding devices may be realized. Related methods are disclosed that include various combinations of crystalline growth, with and without various post-growth thermal conditioning steps.
Silicon carbide epitaxial substrate and method for manufacturing silicon carbide semiconductor device
A silicon carbide epitaxial substrate includes a silicon carbide single crystal substrate and a silicon carbide layer. In a direction parallel to a central region, a ratio of a standard deviation of a carrier concentration of the silicon carbide layer to an average value of the carrier concentration of the silicon carbide layer is less than 5%. The average value of the carrier concentration is more than or equal to 1×10.sup.14 cm.sup.−3 and less than or equal to 5×10.sup.16 cm.sup.−3. In the direction parallel to the central region, a ratio of a standard deviation of a thickness of the silicon carbide layer to an average value of the thickness of the silicon carbide layer is less than 5%. The central region has an arithmetic mean roughness (Sa) of less than or equal to 1 nm. The central region has a haze of less than or equal to 50.
Silicon carbide epitaxial substrate and method for manufacturing silicon carbide semiconductor device
A silicon carbide epitaxial substrate includes a silicon carbide single crystal substrate and a silicon carbide layer. In a direction parallel to a central region, a ratio of a standard deviation of a carrier concentration of the silicon carbide layer to an average value of the carrier concentration of the silicon carbide layer is less than 5%. The average value of the carrier concentration is more than or equal to 1×10.sup.14 cm.sup.−3 and less than or equal to 5×10.sup.16 cm.sup.−3. In the direction parallel to the central region, a ratio of a standard deviation of a thickness of the silicon carbide layer to an average value of the thickness of the silicon carbide layer is less than 5%. The central region has an arithmetic mean roughness (Sa) of less than or equal to 1 nm. The central region has a haze of less than or equal to 50.