Patent classifications
C30B31/22
METHOD FOR PRODUCING GAN LAYERED SUBSTRATE
Provided is a method for producing a GaN layered substrate, comprising the steps of: subjecting a C-plane sapphire substrate 11 having an off-angle of 0.5° to 5° to a high-temperature nitriding treatment at 800° C. to 1,000° C. to carry out a surface treatment of the C-plane sapphire substrate; carrying out epitaxial growth of GaN on the surface of the surface-treated C-plane sapphire substrate 11 to produce a GaN film carrier having a surface of an N polar face; forming an ion implantation region 13.sub.ion by carrying out ion implantation on the GaN film 13; laminating and joining a support substrate 12 with the GaN film-side surface of the ion-implanted GaN film carrier; and separating at the ion-implanted region 13.sub.ion in the GaN film 13 to transfer a GaN thin film 13a onto the support substrate 12, to produce a GaN layered substrate 10 having, on the support substrate 12, a GaN thin film 13a having a surface of a Ga polar face. A GaN layered substrate having a good crystallinity and a surface of a Ga face is obtained by a single transfer process.
METHOD FOR PRODUCING A SUBSTRATE FOR EPITAXIAL GROWTH OF A GALLIUM-BASED III-N ALLOY LAYER
A method of producing a substrate for epitaxial growth of a gallium-based III-N alloy layer comprises the following consecutive steps: providing a donor substrate of semi-insulating monocrystalline silicon carbide, implanting ionic species in the donor substrate so as to form a zone of weakness defining a thin layer of semi-insulating monocrystalline SiC to be transferred, bonding the donor substrate to a first receiving substrate by means of a bonding layer, detaching the donor substrate along the zone of weakness so as to transfer the thin layer of semi-insulating monocrystalline SiC on to the first receiving substrate, forming an additional layer of semi-insulating SiC on the transferred thin layer, bonding the additional layer to a second receiving substrate having a high electrical resistivity, removing at least a portion of the bonding layer so as to detach the first receiving substrate and expose the layer of transferred semi-insulating monocrystalline SiC.
METHOD FOR PRODUCING A SUBSTRATE FOR EPITAXIAL GROWTH OF A GALLIUM-BASED III-N ALLOY LAYER
A method of producing a substrate for epitaxial growth of a gallium-based III-N alloy layer comprises the following consecutive steps: providing a donor substrate of semi-insulating monocrystalline silicon carbide, implanting ionic species in the donor substrate so as to form a zone of weakness defining a thin layer of semi-insulating monocrystalline SiC to be transferred, bonding the donor substrate to a first receiving substrate by means of a bonding layer, detaching the donor substrate along the zone of weakness so as to transfer the thin layer of semi-insulating monocrystalline SiC on to the first receiving substrate, forming an additional layer of semi-insulating SiC on the transferred thin layer, bonding the additional layer to a second receiving substrate having a high electrical resistivity, removing at least a portion of the bonding layer so as to detach the first receiving substrate and expose the layer of transferred semi-insulating monocrystalline SiC.
METHOD FOR PRODUCING A SUBSTRATE FOR THE EPITAXIAL GROWTH OF A LAYER OF A GALLIUM-BASED III-N ALLOY
A method of fabricating a substrate for epitaxial growth of a layer of gallium nitride (GaN), aluminum gallium nitride (AlGaN) or indium gallium nitride (InGaN), comprises the following successive steps: providing a base substrate comprising at least one layer of single-crystal silicon carbide, performing epitaxial growth of a layer of semi-insulating SiC having a thickness larger than 1 m on the layer of single-crystal SiC to form a donor substrate, implanting ionic species into the layer of semi-insulating SiC so as to form a weakened region defining a thin layer of single-crystal semi-insulating SiC to be transferred, bonding the layer of semi-insulating SiC directly to a receiver substrate having a high electrical resistivity, and detaching the donor substrate along the weakened region so as to transfer the thin layer of single-crystal semi-insulating SiC to the receiver substrate.
METHOD FOR PRODUCING A SUBSTRATE FOR THE EPITAXIAL GROWTH OF A LAYER OF A GALLIUM-BASED III-N ALLOY
A method of fabricating a substrate for epitaxial growth of a layer of gallium nitride (GaN), aluminum gallium nitride (AlGaN) or indium gallium nitride (InGaN), comprises the following successive steps: providing a base substrate comprising at least one layer of single-crystal silicon carbide, performing epitaxial growth of a layer of semi-insulating SiC having a thickness larger than 1 m on the layer of single-crystal SiC to form a donor substrate, implanting ionic species into the layer of semi-insulating SiC so as to form a weakened region defining a thin layer of single-crystal semi-insulating SiC to be transferred, bonding the layer of semi-insulating SiC directly to a receiver substrate having a high electrical resistivity, and detaching the donor substrate along the weakened region so as to transfer the thin layer of single-crystal semi-insulating SiC to the receiver substrate.
Semiconductor devices with superjunction structures
A semiconductor device includes: a semiconductor substrate having a bulk oxygen concentration of at least 610.sup.17 cm.sup.3; an epitaxial layer on a first side of the semiconductor substrate, the epitaxial layer and the semiconductor substrate having a common interface; a superjunction semiconductor device structure in the epitaxial layer; and an interface region extending from the common interface into the semiconductor substrate to a depth of at least 10 m. A mean oxygen concentration of the interface region is lower than the bulk oxygen concentration of the semiconductor substrate.
Semiconductor devices with superjunction structures
A semiconductor device includes: a semiconductor substrate having a bulk oxygen concentration of at least 610.sup.17 cm.sup.3; an epitaxial layer on a first side of the semiconductor substrate, the epitaxial layer and the semiconductor substrate having a common interface; a superjunction semiconductor device structure in the epitaxial layer; and an interface region extending from the common interface into the semiconductor substrate to a depth of at least 10 m. A mean oxygen concentration of the interface region is lower than the bulk oxygen concentration of the semiconductor substrate.
EPITAXIAL STRUCTURE OF N-FACE GROUP III NITRIDE, ACTIVE DEVICE, AND METHOD FOR FABRICATING THE SAME WITH INTEGRATION AND POLARITY INVERSION
The present invention provides an epitaxial structure of N-face group III nitride, its active device, and the method for fabricating the same. By using a fluorine-ion structure in device design, a 2DEG in the epitaxial structure of N-face group III nitride below the fluorine-ion structure will be depleted. Then the 2DEG is located at a junction between a i-GaN channel layer and a i-Al.sub.yGaN layer, and thus fabricating GaN enhancement-mode AlGaN/GaN high electron mobility transistors (HEMTs), hybrid Schottky barrier diodes (SBDs), or hybrid devices. After the fabrication step for polarity inversion, namely, generating stress in a passivation dielectric layer, the 2DEG will be raised from the junction between the i-GaN channel layer and the i-Al.sub.yGaN layer to the junction between the i-GaN channel layer and the i-Al.sub.xGaN layer.
EPITAXIAL STRUCTURE OF N-FACE GROUP III NITRIDE, ACTIVE DEVICE, AND METHOD FOR FABRICATING THE SAME WITH INTEGRATION AND POLARITY INVERSION
The present invention provides an epitaxial structure of N-face group III nitride, its active device, and the method for fabricating the same. By using a fluorine-ion structure in device design, a 2DEG in the epitaxial structure of N-face group III nitride below the fluorine-ion structure will be depleted. Then the 2DEG is located at a junction between a i-GaN channel layer and a i-Al.sub.yGaN layer, and thus fabricating GaN enhancement-mode AlGaN/GaN high electron mobility transistors (HEMTs), hybrid Schottky barrier diodes (SBDs), or hybrid devices. After the fabrication step for polarity inversion, namely, generating stress in a passivation dielectric layer, the 2DEG will be raised from the junction between the i-GaN channel layer and the i-Al.sub.yGaN layer to the junction between the i-GaN channel layer and the i-Al.sub.xGaN layer.
Diamond components for quantum imaging, sensing and information processing devices
A single crystal CVD diamond component comprising: a surface, wherein at least a portion of said surface is formed of as-grown growth face single crystal CVD diamond material which has not been polished or etched and which has a surface roughness R.sub.a of no more than 100 nm; and a layer of NV.sup. defects, said layer of NV.sup. defects being disposed within 1 m of the surface, said layer of NV.sup. defects having a thickness of no more than 500 nm, and said layer of NV.sup. defects having a concentration of NV.sup. defects of at least 10.sup.5 NV.sup./cm.sup.2.