A semiconductor wafer suppressed in voids produced in the interface between a passivation film and an electroless nickel plating film, and configured such that an electrode pad is entirely covered by the electroless nickel plating film. The semiconductor wafer includes, on a substrate, an electrode pad and a passivation film covering the upper surface of the substrate and an opening from which the electrode pad is exposed. The semiconductor wafer sequentially includes, on the electrode pad, an electroless nickel plating film, an electroless palladium plating film and an electroless gold plating film. A void, present in the interface between the passivation film and the electroless nickel plating film, has a length from the forefront of the void to the surface of the electrode pad of 0.3 μm or more and a width of 0.2 μm or less. The electrode pad is entirely covered by the electroless nickel plating film.

A method of manufacturing a metal fabric or membrane, the method comprises providing an ink comprising a plurality of semiconductor particles disposed in a first solvent. The method comprises applying the ink to a fabric or membrane to obtain a fabric or membrane comprising a plurality of semiconductor particles. Finally, the method comprises contacting the fabric or membrane comprising the plurality of semiconductor particles with a deposition solution comprising a second solvent, an autocatalytic agent, and metal cations to thereby cause a reaction to occur such that the metal cations are reduced and at least partially displace the semiconductor particles, to thereby provide a metal fabric or membrane.

A plating method includes preparing a substrate having a surface including an adhesive material portion made of a material to which a catalyst easily adheres and a non-adhesive material portion to which the catalyst is difficult to attach; imparting the catalyst to the substrate by supplying a catalyst solution onto the substrate; removing, by supplying a catalyst removing liquid containing a reducing agent onto the substrate, the catalyst from the non-adhesive material portion while allowing the catalyst to be left on a surface of the adhesive material portion; and forming a plating layer selectively on the adhesive material portion by supplying a plating liquid onto the substrate.

A catalyst is imparted selectively to a plateable material portion 32 by performing a catalyst imparting processing on a substrate W having a non-plateable material portion 31 and the plateable material portion 32 formed on a surface thereof. Then, a hard mask layer 35 is formed selectively on the plateable material portion 32 by performing a plating processing on the substrate W. The non-plateable material portion 31 is made of SiO.sub.2 as a main component, and the plateable material portion 32 is made of a material including, as a main component, a material containing at least one of a OCH.sub.x group and a NH.sub.x group, a metal material containing Si as a main component, a material containing carbon as a main component or a catalyst metal material.

A method of electroless nickel plating on surface of silicon carbide powder with a uniform and stable coating. In this method, ultrasonic assist is introduced in the pre-treatment and during plating process, and the powder particles in the liquid are dispersed and deagglomerated by the mechanical action and cavitation of the ultrasonic waves, thereby achieving a uniform dispersion of the powder in the dispersant. Furthermore, a reducing agent is slowly added during plating so as to give a more uniform and stable deposition of the coating onto the surface of the powder particles, and thus a silicon carbide core-nickel shell structure with an excellent powder dispersibility and a uniform and stable coating is produced.

Provided is a silicon bulk thermoelectric conversion material in which thermoelectric performance is improved by reducing the thermal conductivity as compared with the prior art. In the silicon bulk thermoelectric conversion material, the ZT is greater than 0.2 at room temperature with the elemental silicon. In the silicon bulk thermoelectric conversion material, a plurality of silicon grains have an average of 1 nm or more and 300 nm or less, a first hole have an average of 1 nm or more and 30 nm or less present in the plurality of silicon grains and surfaces of the silicon grains, and a second hole have an average of 100 nm or more and 300 nm or less present between the plurality of silicon grains, wherein the aspect ratio of a crystalline silicon grain is less than 10.

Methods of additive manufacturing are described herein. In one aspect, a method of printing an article comprises (a) selectively depositing an initial layer of transition metal or transition metal oxide on a substrate, and (b) at least partially replacing the initial layer of transition metal or transition metal oxide with a noble metal layer via a galvanic replacement reaction. In step (c), an additional layer of transition metal or transition metal oxide is deposited on the noble metal layer, and in step (d), the additional layer of transition metal or transition metal oxide is at least partially replaced with an additional noble metal layer via a galvanic replacement reaction. Steps (c) and (d) are repeated until the article is completed. In some embodiments, the article is subsequently separated from the substrate and can be coupled to a secondary substrate.

A method creating a patterned film with cuprous oxide and light comprising the steps of electrodepositing copper from a solution onto a substrate; illuminating selected areas of said deposited copper with light having photon energies above the band gap energy of 2.0eV to create selected illuminated sections and non-illuminated sections; and stripping non-illuminated sections leaving said illuminated sections on the substrate. An additional step may include galvanically replacing the copper with one or more noble metals.

A semiconductor wafer suppressed in voids produced in the interface between a passivation film and an electroless nickel plating film, and configured such that an electrode pad is entirely covered by the electroless nickel plating film. The semiconductor wafer includes, on a substrate, an electrode pad and a passivation film covering the upper surface of the substrate and an opening from which the electrode pad is exposed. The semiconductor wafer sequentially includes, on the electrode pad, an electroless nickel plating film, an electroless palladium plating film and an electroless gold plating film. A void, present in the interface between the passivation film and the electroless nickel plating film, has a length from the forefront of the void to the surface of the electrode pad of 0.3 m or more and a width of 0.2 m or less. The electrode pad is entirely covered by the electroless nickel plating film.

A method creating a patterned film with cuprous oxide and light comprising the steps of electrodepositing copper from a solution onto a substrate; illuminating selected areas of said deposited copper with light having photon energies above the band gap energy of 2.0 eV to create selected illuminated sections and non-illuminated sections; and stripping non-illuminated sections leaving said illuminated sections on the substrate. An additional step may include galvanically replacing the copper with one or more noble metals.