G06F2213/0052

LED driver circuit, corresponding device and method

A circuit includes a set of LED driver devices and a controller including a set of nodes coupled to a first slave address pin and a second slave address pin in each LED driver devices in the set of LED driver devices. Each LED driver device includes a finite state machine (FSM) configured to generate LED drive PWM-modulated signal patterns, an oscillator configured to generate a clock signal for the FSM, a first signal path activatable between the first slave address pin and the FSM, and a second signal path activatable between the FSM and the second slave address pin.

Modular holding bin having individually configurable food holding modules

A modular food holding bin has multiple food holding units or bins, which can be connected and disconnected from each other in multiple different configurations. Each bin can be set to its own temperature, independently of the others.

Mixed signal device address assignment

Systems, methods, and apparatus for improving addressability of slave devices coupled to a serial bus are described. A method the slave device includes delaying transitions in a control signal received at an input pin of the slave device, enabling a counter after detecting a delayed first transition in the control signal, where the counter is configured to count pulses on a data line of a serial bus, transmitting a first pulse on the data line of the serial bus after enabling the counter, counting the first pulse and one or more additional pulses on the data line of the serial bus, and using an output of the counter to generate a unique identifier used for communicating over the serial bus. Each of a plurality of slave devices may be configured to transmit one of the additional pulses on the serial bus after the first transition occurs in the control signal.

Semiconductor device
RE048514 · 2021-04-13 · ·

According to one embodiment, a semiconductor device includes a device. The device includes a decoder, a generation circuit, a register, and a modifier. The decoder analyzes a command of a received packet. The generation circuit generates a unique device number in accordance with information in the packet. The register holds the generated unique device number. The modifier updates and outputs the packet. When a packet issued by a host is a command packet, among broadcast packets which return to the host through one or more devices, for determining the unique device number, the command packet includes parameters of an initial value and final value of device number.

Automatic addressing scheme for pool system controllers and compatible remote devices
10985939 · 2021-04-20 · ·

Systems and methods are provided for automatically addressing devices of pool and spa systems in a communication network. The communication network includes at least a first transceiver and a second transceiver that are communicatively coupled via a communication network bus. The first transceiver is configured to transmit a query signal to the second transceiver on a first address on the communication network bus, where the query signal includes a command requesting identification data (e.g., a serial number) associated with the second transceiver from the second transceiver. After receiving a response from the second transceiver, the first transceiver verifies (e.g., validates) the identification data. The first transceiver then automatically addresses the second transceiver individually by transmitting an addressed signal that includes at least a portion of the verified identification data and a command to the second transceiver on a second address on the communication network bus.

DEVICE FOR A SINGLE WIRE DIGITAL BUS, MASTER DEVICE, SENSOR, AND METHOD TO ASSIGN ADDRESSES TO MULTIPLE DEVICES ON A SINGLE WIRE DIGITAL BUS

A device for a single wire digital bus, includes an interface for the bus configured to receive a request to arbitrate for an address and to transmit device specific data on the bus upon receipt of the request to arbitrate for an address The device further includes a control circuit configured to determine, if a further device transmits device specific data on the bus, and to use the address arbitrated for, if no further device transmits device specific data on the bus.

Apparatuses and methods involving disabling address pointers
11010323 · 2021-05-18 · ·

An apparatus in various embodiments is for use in a local area network and includes a discernment logic circuit and logic circuitry. The discernment logic circuit discerns whether a requested communications transaction received over the management communications bus from another of the logic nodes involves a first type of transaction or a second type of transaction, the second type of transaction having a plurality of commands associated with the requested communications transaction to convey respectively different parts of the requested communications transaction including an address part and a data part. The logic circuitry disables, in response to a reset of an address pointer in the one of the plurality of logic nodes and the requested communications transaction being the second type of transaction, the address pointer to mitigate a likelihood that the requested communications transaction is performed via the communication protocol while the address pointer for the second type of transaction is erroneous.

Low-power and low-latency device enumeration with cartesian addressing

An enumeration technique is provided that requires no pre-assignment of addresses to slave devices connected through P2P links to a host device. With regard to any P2P link between devices, one device has a master interface and the remaining device has a slave interface. To distinguish between the master and slave interfaces, a master/slave status bit may be used. Each P2P link has a link ID that may be concatenated with the status bit for a corresponding interface (slave or master) to form a node ID. The host device receives a unique concatenated address from each slave device that represents a concatenation of the node ID for the slave and the node ID for any intervening interfaces between the slave device and the host device. The host device then assigns a unique Cartesian address to each slave device.

COMMUNICATION DEVICE FOR VEHICLE AND COMMUNICATION METHOD
20210089474 · 2021-03-25 · ·

A communication device for a vehicle includes: a memory; and a processor that is coupled to the memory, the processor being configured to: generate a first address for a time at which a first control device, which carries out control of a vehicle, communicates with a second control device, carry out communication with the second control device via the first address, and receive, from the second control device, information that specifies the first control device, and on the basis of the information that is received, set, in place of the first address, a second address that corresponds to an instrument that the first control device controls.

Switched mode power supplies with configurable communication addresses

A switched mode power supply includes a communication interface and an address terminal for setting a communication address for the power supply using the resistance of an external resistor when the external resistor is coupled to the address terminal. The power supply is configured to determine a first resistance value for the external resistor using a first technique, determine a second resistance value for the external resistor using a second technique, set the communication address of the power supply using the first resistance value if the first resistance value is greater than a threshold value, and set the communication address of the power supply using the second resistance value if the first resistance value is less than the threshold value. Other example switched mode power supplies, power systems including one or more power supplies, and methods for setting a communication address of a power supply are also disclosed.