Various embodiments are generally directed to an apparatus, method and other techniques for gathering configuration information of a computer system during a system management mode of the computer system and exposing the gathered configuration information to securely attest to the configuration of the system.

Various embodiments are directed to providing integrity protection for a system management mode. During initialization, a hash value of a system management mode control routine may be determined. Subsequently, during operation, the hash value may be compared to a hash value of a system management mode control routine to be executed. The system management mode control routine to be executed may be determined to be authentic if the hash values are the same.

Example implementations relate to memory read requests. For example, an implementation may include tracking progress of an iterative write sequence to write data to a memory element of a memory module. A received read request is detected to be addressed to a memory bank that includes the memory element undergoing the iterative write sequence. Based on the tracked progress, a time is determined to interrupt the iterative write sequence with insertion of the read request. The time aligns between operations of the iterative write sequence and data is returned within a predetermined read latency.

Various embodiments are directed to providing integrity protection for a system management mode. During initialization, a hash value of a system management mode control routine may be determined. Subsequently, during operation, the hash value may be compared to a hash value of a system management mode control routine to be executed. The system management mode control routine to be executed may be determined to be authentic if the hash values are the same.

Methods, systems, and computer readable media for intelligent fetching of storage device commands from submission queues are disclosed. The controller may implement a hierarchical scheme comprising first-level arbitration(s) between submission queues of each of a plurality of input/output virtualization (IOV) functions, and a second-level arbitration between the respective IOV functions. Alternatively, or in addition, the controller may implement a flat arbitration scheme, which may comprise selecting submission queue(s) from one or more groups, each group comprising submission queues of each of the plurality of IOV functions. In some embodiments, the controller implements a credit-based arbitration scheme. The arbitration scheme(s) may be modified in accordance with command statistics and/or current resource availability.

Various embodiments are directed to providing integrity protection for a system management mode. During initialization, a hash value of a system management mode control routine may be determined. Subsequently, during operation, the hash value may be compared to a hash value of a system management mode control routine to be executed. The system management mode control routine to be executed may be determined to be authentic if the hash values are the same.

A storage apparatus accessed by using a memory bus is disclosed. The apparatus includes an interface controller, a storage module, a storage controller, a command register, a status register, and a buffer. In addition, the interface controller can be electrically connected to a memory module interface of a computer system. The interface controller receives an access command for accessing the storage module sent by a CPU. The interface controller writes the access command into the command register, and records a current access status or result by using the status register. The storage controller performs status setting on the status register according to the access command in the command register, and performs a corresponding read/write operation on the storage module.

Example computer-implemented methods, media, and systems for processing input/output (I/O) commands using block size aware polling are disclosed. One example method includes creating multiple polling queues and multiple interrupt queues in a transport drivers layer of a storage stack. A first I/O command is received from a core layer of the storage stack and by the transport drivers layer. A ratio of a total number of multiple small block size commands in the transport drivers layer to a total number of multiple outstanding I/O commands in the transport drivers layer is determined to be larger than a predetermined first threshold. In response to determining that the ratio is larger than the predetermined first threshold, the polling mode is applied to the first I/O command through the submission of the first I/O command to a first polling queue in the multiple polling queues.

Input/output (I/O) components can include electromechanical switches that can be placed respectively on signal lines coupled between transceivers and I/O pads. Electromechanical switches can operate to isolate respective transceivers from the other transceivers and/or I/O pads to protect those transceivers from ESD events. Electromechanical switches of I/O components can be micro-electromechanical systems (MEMS) switches.

Various embodiments are directed to providing integrity protection for a system management mode. During initialization, a hash value of a system management mode control routine may be determined. Subsequently, during operation, the hash value may be compared to a hash value of a system management mode control routine to be executed. The system management mode control routine to be executed may be determined to be authentic if the hash values are the same.