The present invention provides a source driver and a source drive method of a liquid crystal panel of unequal row drive width. By providing the input signal decoding control unit electrically coupled to the plurality of data signal output channels and encoding the data signal output channel start address signal and the data signal output channel end address signal in the transport packages of the data signal to be transported to the input signal decoding control unit, the input signal decoding control unit controls the amount of activated data signal output channels to adjust the row drive width for each scan according to the received data signal output channel start address signal and the received data signal output channel end address signal. The row drive width of scan for each row can be dynamically adjusted to transport the data signal to the pixels required to display in each row. It is applicable for non rectangular display for reducing the output power of the liquid crystal panel and the source driver of the liquid crystal panel of unequal row drive width is derived from the present drive structure design. The structure is simple.

The present application discloses a display panel and a display device. The display panel comprises a plurality of data signal lines; a plurality of scan signal lines intersecting with the plurality of data signal lines, to define a plurality of sub-pixels in an array, and each of the sub-pixels comprising a pixel driving circuit, and an external compensation circuit, comprising a power supply unit, a sampling unit and a data signal generation unit, being connected to the data signal lines, and transmitting a compensated data signal via the data signal lines to the pixel driving circuits. In the present implementation, voltage compensation is performed by the external compensation circuit on the driving transistor and the organic light emitting diode in the pixel driving circuit, to improve the driving capability of the pixel driving circuit and increases the display precision of the display panel.

A shift register includes an input sub-circuit, a control sub-circuit, an output sub-circuit and a reset sub-circuit. The input sub-circuit is configured to transmit an input signal from an input signal terminal to a pull-up node. The control sub-circuit is configured to transmit a clock signal from a clock signal terminal to the control node. The output sub-circuit is configured to transmit a second voltage signal from a second voltage signal terminal to a first output signal terminal, and to transmit a first voltage signal from a first voltage signal terminal to the first output signal terminal. The reset sub-circuit is configured to transmit the second voltage signal to the control node to reset the control node, and to transmit a third voltage signal from the third voltage signal terminal to the pull-up node to reset the pull-up node.

Method and system for programming and driving active matrix light emitting device pixel is provided. The pixel is a voltage programmed pixel circuit, and has a light emitting device, a driving transistor and a storage capacitor. The pixel has a programming cycle having a plurality of operating cycles, and a driving cycle. During the programming cycle, the voltage of the connection between the OLED and the driving transistor is controlled so that the desired gate-source voltage of a driving transistor is stored in a storage capacitor.

A display device includes pixels, each including a first transistor including a gate electrode, a first electrode, and a second electrode coupled to a first node, a first power line, and a second node, respectively, a second transistor including a gate electrode, a first electrode, and a second electrode coupled to a scan line, the first node, and a third node, respectively, a third transistor including a gate electrode, a first electrode, and a second electrode coupled to a control line, the third node, and the second node, respectively, a first capacitor including first and second electrodes coupled to the first node and an initialization line, respectively, a second capacitor including first and second electrodes coupled to the third node and a data line, respectively, and a light-emitting diode including an anode and a cathode coupled to the second node and a second power line.

A drive circuit has a ferroelectric liquid crystal panel that operates at a given switching angle and response speed, a sensor that measures temperature, a drive circuit that supplies driving voltage to the ferroelectric liquid crystal panel, a waveform generation circuit that supplies a waveform signal to the drive circuit, and a control circuit that controls the waveform generation circuit; and in a first frame of the driving voltage, outputs during a first interval, a first voltage that is positive and outputs during a second interval that is longer than the first interval, a second voltage that is positive, and in a second frame, outputs during the first interval, the first voltage that is negative and outputs during the second interval that is longer than the first interval, the second voltage that is negative. The control circuit varies the first voltage and the second voltage according to the measured temperature.

An electronic device according to various embodiments may include a display panel, a Display Driving Integrated Circuit (DDIC) operatively coupled to the display panel, and a processor operatively coupled to the DDIC. The DDIC may be configured to receive, from the processor, a signal indicating that a first resolution is to be converted to a second resolution while displaying an image at the first resolution through the display panel, based on a horizontal synchronization signal including a first porch interval, change a length of the porch interval in response to the reception, and display the image at the second resolution through the display panel, based on the horizontal synchronization signal including the porch interval having the changed length.

A display device provides pulse width modulation (PWM) control of pixels using comparator circuits within each pixel. The display device includes a display panel and a row driver connected to the display panel. The row driver includes a counter configured to generate count bit values for subframes of a pulse width modulation (PWM) frame. The display panel includes pixels, each pixel including a comparator circuit and a light emitting diode. The comparator circuit includes a dynamic comparison node. The comparator circuit is configured to generate comparison results at the dynamic comparison node by comparing the count bit values of the subframes and data bit values of a control word defining a brightness level of the pixel for the PWM frame. The LED is configured to turn on or off responsive to the comparison results at the dynamic comparison node.

A display device includes a scan write line for receiving a scan write signal, a first driving voltage line for receiving a first driving voltage, a first data line for receiving first data voltages, a second data line for receiving second data voltages, and a sub-pixel connected to the scan write line, the first data line, the second data line, and the first driving voltage line, wherein the sub-pixel includes a light emitting element connected to the first driving voltage line, a constant current generator configured to apply a driving current to the light emitting element according to a first data voltage among the first data voltages of the first data line, and a light emission period controller configured to control a light emission period of the light emitting element according to a second data voltage among the second data voltages of the second data line.

An oscillation circuit includes: a periodic signal generator which generates a periodic signal whose frequency varies; and a clock generator which generates a clock signal having a frequency commensurate with the frequency of the periodic signal.