A display panel control method for a display panel. The display panel includes at least one common electrode line and a plurality of data lines. The method provides a timing control signal including an active interval and a vertical blanking interval. The timing control signal is used to make the display panel either enter the active interval or enter the vertical blanking interval to execute corresponding operation procedures. When the display panel is in the active interval, the method provides corresponding data voltage to every data line according to the image data. When the display panel is in the vertical blanking interval, the method provides a blanking data voltage to every data line. The blanking data voltage is determined according to the polarity of the corresponding data voltage of the corresponding data line and a common voltage of the at least one common electrode line.

A display apparatus includes a display panel having a plurality of gate lines, a plurality of data lines, and a plurality of subpixels. Each of the plurality of subpixels includes a subpixel electrode connected to one of the plurality of gate lines and one of the plurality of data lines through a switching element. A gate driver is configured to output a plurality of gate signals to the plurality of gate lines and to deactivate at least one of the plurality of gate signals in a P-th frame. A data driver is configured to output a plurality of data voltages to the plurality of data lines. Here, P is a positive integer.

The present disclosure relates to an LED driving technology. According to the present disclosure, it is possible to increase the fineness of the gray scale without increasing a frequency of a clock by combining a plurality of driving current sources to generate a driving current supplied to one driving line.

The present application discloses an organic light-emitting display panel and a driving method thereof, as well as an organic light-emitting display device. The display panel includes: an array arrangement including pixel units, wherein each pixel unit comprises a first, a second, a third and a fourth subpixels; a pixel circuit is formed in each subpixel; the first, second, third and fourth subpixels of an identical pixel unit are arranged along a column direction and are electrically connected with a given reference signal line; a color of the first subpixel, a color of the second subpixel, a color of the third subpixel and a color of the fourth subpixel differ from one another, and the color of the first subpixel, the color the second subpixel and the color the third subpixel are red, blue and green, respectively; and the color of the fourth subpixel is not white.

A display device includes at least a first luminance range and a second luminance range which includes a luminance different from the first luminance range. In a boundary area of a second dimming range corresponding to the second luminance range and which is adjacent to a first dimming range corresponding to the first luminance range, a reference luminance emitted from a pixel is maintained as a first constant luminance value, and an off-duty number, which is the number of periods in which the pixel is turned off during one frame, is gradually increased by an emission control signal.

A gate driving circuit includes a plurality of unit stages connected to each other, wherein each of the plurality of unit stages includes a first transistor having a lower gate electrode, an upper gate electrode disposed on the lower gate electrode, an active layer disposed between the lower gate electrode and the upper gate electrode, a first electrode contacting a first portion of the active layer, and a second electrode contacting a second portion of the active layer, a first capacitor defined by a first region in which the lower gate electrode and the upper gate electrode overlap, and a second capacitor defined by a second region in which the upper gate electrode and the first electrode overlap, wherein the upper gate electrode and the lower gate electrode are electrically coupled to each other in the first region where the upper gate electrode and the lower gate electrode overlap to form the first capacitor.

A pixel circuit including an organic light emitting diode, a first transistor configured to drive the organic light emitting diode, a second transistor electrically connected between a gate node of the first transistor and a data line, a third transistor electrically connected between a source node of the first transistor and an initialization voltage line and a storage capacitor electrically connected between the gate node and the source node of the first transistor. In a data writing period in which the storage capacitor is charged with electric charges, a turn-off time of the third transistor lags compared to a turn-off time of the second transistor.

A pixel circuit, is provided, including: a light-emitting element, a driving circuit, a data writing circuit, an on-off control circuit, a first initialization circuit and an energy storage circuit; the data writing circuit writes a data voltage into a third node under control of a first gate driving signal; the on-off control circuit controls communication between a first node and the third node under the control of the first gate driving signal; the first initialization circuit controls writing an initialization voltage into the first node under the control of the first gate driving signal; and a type of a transistor included in the first initialization circuit is different from a type of a driving transistor included in the driving circuit, and a type of a transistor included in the data writing circuit is different from the type of the driving transistor of the driving circuit.

A display device includes: a substrate including first and second display regions and first and second non-display regions; a plurality of first pixels in the first display region; a plurality of second pixels in the second display region; a plurality of first scan stage circuits in the first non-display region, the first scan stage circuits configured to provide a scan signal to the first pixels; a plurality of second scan stage circuits in the second non-display region, the second scan stage circuits configured to provide a scan signal to the second pixels; a plurality of dummy scan stage circuits in the second non-display region, the dummy scan stage circuits being between the second scan stage circuits; and a scan bridge line in the second non-display region, the scan bridge line connecting one second scan stage circuit among the second scan stage circuits and a dummy scan stage circuit adjacent thereto.

Embodiments of the disclosure relate to an organic light emitting display panel and an organic light emitting display device including the same, and more specifically, to an organic light emitting display panel and an organic light emitting display device which include: an insulation film with at least one concave portion including a flat portion and an inclined portion surrounding the flat portion in at least one subpixel, a first electrode disposed on the concave portion, an organic layer disposed on the first electrode, a second electrode disposed on the organic layer, an encapsulation layer disposed on the second electrode, and at least one structure disposed on the encapsulation layer, overlapping at least one light emitting area, and having at least a side surface where a light reflecting member is disposed, thereby enhancing light extraction efficiency.