G01R31/11

Method for in situ functionality testing of switches and contacts in semiconductor interface hardware
11555856 · 2023-01-17 · ·

A method is provided for in situ functionality testing of electrical switches using a Functional Reflectometry Test (FRT) of switches on the signal path of electrical circuits in a semiconductor interface. The method includes initiating the functionality testing of the electrical switches in situ, wherein the functionality of the electrical switches is tested while the electrical switches are connected to the Automatic Test Equipment (ATE) and are in-use testing semiconductors. The method also includes conducting full Functional Reflectometry Testing of the electrical switches in situ in an open switch state and a closed switch state to determine whether each of the electrical switches is one of fully functional, stuck closed, and stuck open, wherein testing for each state is performed as a single vector functional test to minimize test time overhead.

Method for in situ functionality testing of switches and contacts in semiconductor interface hardware
11555856 · 2023-01-17 · ·

A method is provided for in situ functionality testing of electrical switches using a Functional Reflectometry Test (FRT) of switches on the signal path of electrical circuits in a semiconductor interface. The method includes initiating the functionality testing of the electrical switches in situ, wherein the functionality of the electrical switches is tested while the electrical switches are connected to the Automatic Test Equipment (ATE) and are in-use testing semiconductors. The method also includes conducting full Functional Reflectometry Testing of the electrical switches in situ in an open switch state and a closed switch state to determine whether each of the electrical switches is one of fully functional, stuck closed, and stuck open, wherein testing for each state is performed as a single vector functional test to minimize test time overhead.

Monitoring waveforms from waveform generator at device under test
11693046 · 2023-07-04 · ·

A test and measurement instrument including a signal generator configured to generate a waveform to be sent over a cable to a device under test (DUT) and a real-time waveform monitor (RTWM) circuit. The RTWM is configured to determine a propagation delay of the cable, capture a first waveform, including an incident waveform and a reflection waveform at a first test point between the signal generator and the DUT, capture a second waveform including at least the incident waveform at a second test point between the signal generator and the DUT, determine a reflection waveform and the incident waveform based on the first waveform and the second waveform, and determine a DUT waveform based on the incident waveform, the reflection waveform, and the propagation delay. The DUT waveform represents the waveform generated by the signal generator as received by the DUT.

Monitoring waveforms from waveform generator at device under test
11693046 · 2023-07-04 · ·

A test and measurement instrument including a signal generator configured to generate a waveform to be sent over a cable to a device under test (DUT) and a real-time waveform monitor (RTWM) circuit. The RTWM is configured to determine a propagation delay of the cable, capture a first waveform, including an incident waveform and a reflection waveform at a first test point between the signal generator and the DUT, capture a second waveform including at least the incident waveform at a second test point between the signal generator and the DUT, determine a reflection waveform and the incident waveform based on the first waveform and the second waveform, and determine a DUT waveform based on the incident waveform, the reflection waveform, and the propagation delay. The DUT waveform represents the waveform generated by the signal generator as received by the DUT.

Binary reflectometry system for analyzing faults in a transmission line

A reflectometry system for analyzing faults in a transmission line, a reference signal being generated, in an initial step, and injected in the transmission line, the system includes a device (CPL) for acquiring the analog signal back-propagated in the transmission line, an equalization circuit (EGA) configured for equalizing the amplitudes obtained on the reflectogram for the peaks of the injected signal after its point of injection into the transmission line and of the signal reflected on the end of the transmission line, a binarization device (B) for converting the back-propagated analog signal into a signal digitized over two quantization levels, a correlator (COR) configured for correlating the digitized signal with the reference signal in order to produce a time-domain reflectogram, a module for analyzing the time-domain reflectogram in order to identify the presence of faults in the transmission line.

Binary reflectometry system for analyzing faults in a transmission line

A reflectometry system for analyzing faults in a transmission line, a reference signal being generated, in an initial step, and injected in the transmission line, the system includes a device (CPL) for acquiring the analog signal back-propagated in the transmission line, an equalization circuit (EGA) configured for equalizing the amplitudes obtained on the reflectogram for the peaks of the injected signal after its point of injection into the transmission line and of the signal reflected on the end of the transmission line, a binarization device (B) for converting the back-propagated analog signal into a signal digitized over two quantization levels, a correlator (COR) configured for correlating the digitized signal with the reference signal in order to produce a time-domain reflectogram, a module for analyzing the time-domain reflectogram in order to identify the presence of faults in the transmission line.

Systems and methods for determining reflection and transmission coefficients

A method is provided for calibrating a terminal device connected to a transmission line containing an impairment. The method includes steps of obtaining a sequence of frequency domain samples for a digital signal transmitted to the terminal device, determining a reflection coefficient from the obtained frequency domain sequence and a reflection signal arising from the impairment, converting the sequence of frequency domain samples and the frequency domain reflection signal into the time domain to generate a complex time domain sample sequence having a real I time component and an imaginary Q time component, correcting the time domain sample sequence into a corrected time sequence having a phase value of the Q component corresponding to a phase value of the I component, calculating a correcting spin coefficient from the corrected time sequence, and calibrating the terminal device with the correcting spin coefficient to mitigate a rotation of the reflection coefficient.

CHANNEL PREDICTIVE BEHAVIOR AND FAULT ANALYSIS

Channel predictive behavior and fault analysis may be provided. A forward time value may be determined comprising a time a forward signal takes to travel from a transmitter over a channel to the receiver. Next, a reflected time value may be determined comprising a time a reflected signal takes to travel to the receiver. The reflected signal may be associated with the forward signal. A discontinuity may then be determined to exist on the channel based on the forward time value and the reflected time value. The reflected signal may be caused by the discontinuity and a high impedance or low impedance at the transmitter present after the forward signal is sent.

DETECTION OF ELECTRIC ARCS IN AN ELECTRICAL SYSTEM

A method for detecting an electrical arc in an electrical system including analyzing a reflectogram representative of a spatial distribution of impedance in said electrical system and, when an electric arc is identified in the reflectogram, incrementing a detection counter by one unit.

DETECTION OF ELECTRIC ARCS IN AN ELECTRICAL SYSTEM

A method for detecting an electrical arc in an electrical system including analyzing a reflectogram representative of a spatial distribution of impedance in said electrical system and, when an electric arc is identified in the reflectogram, incrementing a detection counter by one unit.