Patent classifications
G01R31/2648
Semiconductor wafer evaluation apparatus and semiconductor wafer manufacturing method
A semiconductor wafer evaluation apparatus brings a contact maker (mercury liquefied at room temperature), as a Schottky electrode, into contact with a semiconductor wafer, intermittently applies a voltage from a pulse power supply, and evaluates the state (kinds, density) of point defects by an evaluation means based on the status of the electrostatic capacity of the semiconductor wafer. In this manner, the state (kinds, density) of the point defects in the plane of a large-diameter semiconductor wafer is directly evaluated using a large table.
MULTIPLEXED DLTS AND HSCV MEASUREMENT SYSTEM
Techniques and systems are described that enable multiplexed DLTS and HSCV measurements.
Methods for assessing semiconductor structures
Methods for assessing the quality of a semiconductor structure having a charge trapping layer to, for example, determine if the structure is suitable for use as a radiofrequency device are disclosed. Embodiments of the assessing method may involve measuring an electrostatic parameter at an initial state and at an excited state in which charge carriers are generated.
STRUCTURE AND METHOD FOR TESTING SEMICONDUCTOR DEVICE
A structure for testing a semiconductor device. A first resistor structure (R1) comprises a first active region (110) and a first polysilicon gate (130) disposed on the first active region (110); the width of the first active region (110) is greater than a predetermined width value; the predetermined width value is the critical value of the width of an active region of the semiconductor device when the step height of a shallow trench isolation structure of the semiconductor device affects the width of a polysilicon gate; the design width of the first polysilicon gate (130) is identical to that of the polysilicon gate of the semiconductor device; a second resistor structure (R2) is connected to the first resistor structure (R1) according to a predetermined circuit structure to form a test circuit, and comprises a second active region (210) and a second polysilicon gate (230) disposed on the second active region (210); the width of the second active region (210) is less than the predetermined width value; the design size of the second polysilicon gate (230) is identical to that of the first polysilicon gate (130); the total resistance of a branch circuit where the second resistor structure (R2) is located is equal to the total resistance of a branch circuit where the first resistor structure (R1) is located.
METHOD FOR OBTAINING THE EQUIVALENT OXIDE THICKNESS OF A DIELECTRIC LAYER
In a method for obtaining the equivalent oxide thickness of a dielectric layer, a first semiconductor capacitor including a first silicon dioxide layer and a second semiconductor capacitor including a second silicon dioxide layer are provided and a modulation voltage is applied to the semiconductor capacitors to measure a first scanning capacitance microscopic signal and a second scanning capacitance microscopic signal. According to the equivalent oxide thicknesses of the silicon dioxide layers and the scanning capacitance microscopic signals, an impedance ratio is calculated. The modulation voltage is applied to a third semiconductor capacitor including a dielectric layer to measure a third scanning capacitance microscopic signal. Finally, the equivalent oxide thickness of the dielectric layer is obtained according to the equivalent oxide thickness of the first silicon dioxide layer, the first scanning capacitance microscopic signal, third scanning capacitance microscopic signal, and the impedance ratio.
SYSTEM AND METHOD OF SEMICONDUCTOR CHARACTERIZATION
A system for characterizing a semiconductor sample is disclosed. The system comprises a measurement subsystem, a data analysis subsystem, and a statistical analysis subsystem coupled to each other via an interconnection. The measurement subsystem excites a semiconductor sample by shining light on one or more points in the semiconductor sample to generate electron hole pairs, which creates a change in conductivity of the semiconductor sample. The measurement subsystem measures one or more voltage decay curves corresponding to the one or more points in the semiconductor sample based on the changes in conductivity, and transmits the measured voltage decay curves to the data analysis subsystem. The data analysis subsystem extracts one or more normalized decay curves from the transmitted measured voltage decay curves, which the data analysis subsystem then transmits to the statistical analysis subsystem. The statistical analysis subsystem analyzes the transmitted normalized decay curves.
System and method for electrical characterization of electrical materials
Systems and methods can provide a fast and accurate way to measure conductivity and Hall effect, such that transient conductivities, transient carrier densities or transient mobilities can be measured on millisecond time scales, for example. The systems and methods can also reduce the minimum magnetic field needed to extract carrier density or mobility of a given sample, and reduce the minimum mobility that can be measured with a given magnetic field.
Method, device and system for measuring an electrical characteristic of a substrate
The disclosure relates to a device for measuring an electrical characteristic of a substrate comprising a support made of a dielectric material having a bearing surface, the support comprising an electrical test structure having a contact surface flush with the bearing surface of the support, the bearing surface of the support and the contact surface of the electrical test structure being suitable for coming into close contact with a substrate. The measurement device also comprises at least one connection bump contact formed on another surface of the support and electrically linked to the electrical test structure. This disclosure also relates to a system for characterizing a substrate and a method for measuring a characteristic of a substrate employing the measurement device.
Contactless measurement of the conductivity of semiconductors using a multicarrier frequency test signal
Method of contactless measurement of the conductivity of semiconductors, said method being implemented by: a first assembly comprising a signal emission/reception system a second assembly comprising at least one semi-conducting target and an inductor element, a third assembly, said method comprising at least the following steps: a) the first assembly emits a multifrequency signal, b) the second assembly reflects or transmits at least one part of the multifrequency signal emitted, c) the first assembly receives the reflected multifrequency signal reflected by the second assembly, d) the third assembly calculates the coefficient of reflection or of transmission of the emitted signal, e) the third assembly provides the conductivity of the semiconducting target.
Dispersion model for band gap tracking
Methods and systems for determining band structure characteristics of high-k dielectric films deposited over a substrate based on spectral response data are presented. High throughput spectrometers are utilized to quickly measure semiconductor wafers early in the manufacturing process. Optical models of semiconductor structures capable of accurate characterization of defects in high-K dielectric layers and embedded nanostructures are presented. In one example, the optical dispersion model includes a continuous Cody-Lorentz model having continuous first derivatives that is sensitive to a band gap of a layer of the unfinished, multi-layer semiconductor wafer. These models quickly and accurately represent experimental results in a physically meaningful manner. The model parameter values can be subsequently used to gain insight and control over a manufacturing process.