A method to establish a degradation state of electrical connections in a power semiconductor device comprising:

measuring at least two voltage drop values under two respective current values for the same temperature value. The two current values are strictly different or the measurements are made under two distinct gate levels of a transistor;

saving the measured values as calibration data;

monitoring operational conditions of said power semiconductor device;

measuring at least two voltage drop values under respective same current values as preceding, and at two respective moments during which the monitored operational conditions corresponding to two respective predefined sets of criteria related to states of operation and to a common temperature;

saving the at least two values as operational data;

calculating a numerical index in a manner to estimate a degradation state of said power semiconductor device.

An operating condition monitor (100) for monitoring an operating condition of a transistor-based power converter (102), comprising: a sensing apparatus (106) configured to measure a turn-off transient energy of the power converter (102), a processor (108) in communication with the sensing apparatus (106) to receive the measurement of the turn-off transient energy, the processor being configured to: compare the measurement of the turn-off transient energy to a threshold; and issue an event signal based on the comparison to the threshold meeting a comparison criterion. A method (200, 200) of monitoring an operating state of a transistor-based power converter is also disclosed.

Device, circuit, system, and method for contact sequencing are discussed. An electrical circuit includes a first pair of terminals adapted to be connected across a first set of switchable contacts, and a second pair of terminals adapted to be connected across a second set of switchable contacts that are coupled to an arc suppression circuit. A controller circuit is coupled to the first and second pairs of terminals and is configured to sequence activation or deactivation of the first and second sets of contacts based on a contact control signal. A first power switching circuit is coupled to the first pair of terminals and the controller circuit. The first power switching circuit is configured to switch power from an external power source and to trigger the activation or the deactivation of the first set of switchable contacts based on a first logic state signal from the controller circuit.

An example test system includes: a test rack including test slots; first and second shuttles that are configured to move contemporaneously to transport devices towards and away from trays, with at least some of the devices having been tested and at least some of the devices to be tested; first and second robots that are configured to move contemporaneously to move the devices that have been tested from test sockets in test carriers to the first and second shuttles, and to move the devices to be tested from the first and second shuttles to the test sockets in test carriers; and first and second test arms that are configured to move contemporaneously to move the test carriers between the first and second robots and the test rack.

An example test system includes: a test rack including test slots; first and second shuttles that are configured to move contemporaneously to transport devices towards and away from trays, with at least some of the devices having been tested and at least some of the devices to be tested; first and second robots that are configured to move contemporaneously to move the devices that have been tested from test sockets in test carriers to the first and second shuttles, and to move the devices to be tested from the first and second shuttles to the test sockets in test carriers; and first and second test arms that are configured to move contemporaneously to move the test carriers between the first and second robots and the test rack.

A drive circuit for a power semiconductor element according to the present disclosure includes: a control command unit that outputs a turn-on command for a power semiconductor element; a gate voltage detection unit that detects a gate voltage applied to a gate terminal after the control command unit outputs the turn-on command; a differentiator that subjects the gate voltage detected by the gate voltage detection unit to time differentiation; and a determination unit that determines, based on the gate voltage detected by the gate voltage detection unit and a differential value by the differentiator, whether the power semiconductor element is in a short-circuit state or not.

A drive circuit for a power semiconductor element according to the present disclosure includes: a control command unit that outputs a turn-on command for a power semiconductor element; a gate voltage detection unit that detects a gate voltage applied to a gate terminal after the control command unit outputs the turn-on command; a differentiator that subjects the gate voltage detected by the gate voltage detection unit to time differentiation; and a determination unit that determines, based on the gate voltage detected by the gate voltage detection unit and a differential value by the differentiator, whether the power semiconductor element is in a short-circuit state or not.

A voltage driver shifts a voltage on a gate as a control terminal of a power semiconductor element in response to an ON command or an OFF command. A gate voltage detector generates a detection signal of a gate-emitter voltage. A delay signal generator generates a delay signal obtained by adding a delay time to the detection signal. A subtractor generates a voltage difference signal between the detection signal and the delay signal. When the voltage difference signal exceeds a reference voltage during an operation of turning on the power semiconductor element, a short-circuit state detector detects a hard-switching fault.

A voltage driver shifts a voltage on a gate as a control terminal of a power semiconductor element in response to an ON command or an OFF command. A gate voltage detector generates a detection signal of a gate-emitter voltage. A delay signal generator generates a delay signal obtained by adding a delay time to the detection signal. A subtractor generates a voltage difference signal between the detection signal and the delay signal. When the voltage difference signal exceeds a reference voltage during an operation of turning on the power semiconductor element, a short-circuit state detector detects a hard-switching fault.

A control method includes: determining a first state of a plurality of components in an electronic device; acquiring a first operating state of the electronic device; and determining whether to allow one or more of the plurality of components to be removed based on the first state of the plurality of components and the first operating state of the electronic device.