Embodiments of the present disclosure provide methods, systems, apparatus, and computer program products are for detecting whether a suspect component such as an integrated circuit (IC) or a system-on-chip (SoC) is recycled. Specifically, various embodiments involve processing power supply rejection ratio (PSRR) data obtained from a low drop-out regulator (LDO) used for the suspect component using a recycle detection machine learning model to generate a recycle prediction. In particular embodiments, the recycle detection machine learning model is developed based at least in part on degradation of PSRRs of LDOs. Accordingly, a determination is made as to whether the suspect component is recycled based on the recycle prediction. If so, then an indication that the suspect component is recycled is provided.

A semiconductor wafer test system for controlling the supply of power to a semiconductor wafer test apparatus is provided. The semiconductor wafer test system includes a test operating server and the semiconductor wafer test apparatus. The test operating server manages a wafer test schedule and allocates lots to a prober, which loads wafers into the semiconductor wafer test apparatus, in accordance with the wafer test schedule. The test operating server sends a mode switch request to the semiconductor wafer test apparatus in accordance with the wafer test schedule, and the semiconductor wafer test apparatus is switched to a waiting mode in response to receipt of a request to switch to the waiting mode from the test operating server, and is switched to a ready mode in response to receipt of a request to switch to the ready mode from the test operating server.

Optimizing data approximation analysis using low power circuitry including receiving a plurality of data bits each corresponding to a binary indication of a test result; placing each of the plurality of data bits on an approximation circuit, wherein each of the data bits is placed on the approximation circuit by applying, to a first capacitor during a set time period, a voltage corresponding to the data bit, and wherein placing each of the plurality of data bits on the approximation circuit results in a resulting voltage stored on the first capacitor; and determining a potential correlation of the test results by comparing the resulting voltage to a voltage threshold.

Device(s) and method(s) related generally to a wafer or die stack are disclosed. In one such device, a die stack of two or more integrated circuit dies has associated therewith test circuits corresponding to each level of the die stack each with a set of pads. A test data-input path includes being from: a test data-in pad through a test circuit to a test data-out pad of each of the test circuits; and the test data-out pad to the test data-in pad between consecutive levels of the test circuits. Each of the set of pads includes the test data-in pad and the test data-out pad respectively thereof. A test data-output path is coupled to the test data-out pad of a level of the levels.

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

A semiconductor device includes a control signal generation circuit configured to shift a test mode signal in response to a clock signal to generate a plurality of control signals, and a plurality of temperature sensing circuits each including a first resistor having a resistance that varies depending on temperature and configured to generate a temperature sensing signal based on the resistance in response to a corresponding control signal of the plurality of control signals.

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

An electronics-harmful-radiation (EHR) monitoring system includes an EHR measurement circuit. The EHR measurement circuit includes a first device, a single event upset (SEU) detector circuit configured to determine a first number of SEUs of the first device during a first period, and an EHR measurement generator configured to generate a first EHR value based on the first number of SEUs and the first period.

A characteristic detection apparatus includes: a characteristic detector that detects an electrical characteristic of an electronic component placed on a substrate; and a pressing member that is provided separately from the characteristic detector, and generates a pressing force to press the characteristic detector to the substrate, causing the characteristic detector to be electrically connected to the electronic component.

A semiconductor device, a semiconductor system, and a control method of a semiconductor device are capable of accurately monitoring the lowest operating voltage of a circuit to be monitored. According to one embodiment, a monitor unit of a semiconductor system includes a voltage monitor that is driven by a second power supply voltage different from a first power supply voltage supplied to an internal circuit that is a circuit to be monitored and monitors the first power supply voltage, and a delay monitor that is driven by the first power supply voltage and monitors the signal propagation period of time of a critical path in the internal circuit.