An array substrate includes a substrate; a gate disposed on the substrate; a first insulating layer covering the gate; a first semiconductor layer and a second semiconductor layer that are provided on the first insulating layer, a channel corresponding to the gate being provided in the first semiconductor layer and second semiconductor layer, the second semiconductor layer including a first metal oxide semiconductor layer and a second metal oxide semiconductor layer which are stacked, both the first metal oxide semiconductor layer and the second metal oxide semiconductor layer being disconnected at the channel, and the oxygen vacancy concentration of the second metal oxide semiconductor layer being less than the oxygen vacancy concentration of the first metal oxide semiconductor layer; and a source and a drain that are provided on the second semiconductor layer, both the source and the drain being in electrically conductive contact with the second semiconductor layer.

A liquid crystal display device according to FFS technology is provided, which sufficiently provides a common electrode with common electric potential and improves an aperture ratio of pixels. A pixel electrode is formed of a first layer transparent electrode. A common electrode made of a second layer transparent electrode is formed above the pixel electrode interposing an insulation film between them. The common electrode in an upper layer is provided with a plurality of slits. The common electrode extends over all the pixels in a display region. An end of the common electrode is disposed on a periphery of the display region and connected with a peripheral common electric potential line that provides a common electric potential Vcom. There is provided neither an auxiliary common electrode line nor a pad electrode, both of which are provided in a liquid crystal display device according to a conventional art.

To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.

A semiconductor device can be formed by etching a cavity in a first silicon layer that overlies an insulating layer, epitaxially growing a germanium or silicon-germanium layer in the cavity, epitaxially growing a second silicon layer in the cavity, etching the second silicon layer and the germanium or silicon-germanium layer to the floor of the cavity to define a first strip in the second silicon layer and a second strip in the germanium or silicon-germanium layer, selectively etching a portion of the second strip to decrease the width of the second strip, filling cavity portions arranged on either side of the first and second strips with an insulator, depositing an upper insulating layer over the first and second strips, and bonding a layer of III-V material to the upper insulating layer.

A liquid crystal display device with a high aperture ratio is provided. A liquid crystal display device with low power consumption is provided.

The display device includes a display portion and a driver circuit portion. The display portion includes a liquid crystal element, a first transistor, a scan line, and a signal line. The driver circuit portion includes a second transistor. The liquid crystal element includes a pixel electrode, a liquid crystal layer, and a common electrode. Each of the scan line and the signal line is electrically connected to the first transistor. The scan line and the signal line each include a metal layer. The structure of the first transistor is different from that of the second transistor. The first transistor is electrically connected to the pixel electrode. The first transistor includes a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region have a function of transmitting visible light. Visible light passes through the first region and the liquid crystal element and is emitted to the outside of the display device.

The present invention provides a siloxane compound having a novel structure, the compound not being reactive with a polyamic acid which is a polyimide precursor. In addition, provided is a polyimide precursor composition having improved storage stability by adding the siloxane compound as an enhancer for adhesion between a polyimide and a substrate made of an inorganic material. According to the present invention, provided is a multifunctional polyimide film having improved adhesiveness with a substrate made of an inorganic material while having improved optically isotropic characteristics and reduced residual stress characteristics with respect to a substrate.

A driving substrate is provided. The driving substrate includes a substrate and a thin film transistor disposed on the substrate. The thin film transistor is divided into at least two active blocks. Two adjacent ones of the at least two active blocks are separated from each other by a first gap, and a ratio of the first gap to an average width of the two adjacent ones of the at least two active blocks in a first direction is greater than or equal to 0.1 and less than 0.5.

A base plate, comprising: a substrate; an array switch formed on the substrate; a first passivation layer formed at the array switch; a second passivation layer located on the first passivation layer; at least one color filter layer formed between the first passivation layer and the second passivation layer; a distance adjustment layer formed between the first passivation layer and the second passivation layer so as to increase a distance between the first passivation layer and the second passivation layer; and a pixel electrode layer formed on the second passivation layer, the pixel electrode layer being electrically connected to the array switch by means of a via penetrating the first passivation layer, the color filter layer, the distance adjustment layer, and the second passivation layer.

An optical isolator on a silicon photonic integrated circuit. The optical isolator comprising: a polarization splitter; a polarization rotator; and a Faraday rotator. The Faraday rotator comprises: one or more magnets providing a magnetic field; and a silicon spiral delay line. The silicon spiral delay line being formed from a silicon waveguide shaped into a spiral region having no built-in phase shifters and a central region within the spiral region. The central region having no more than a total of 180 degree of phase shifters.

A first transistor, a second transistor, a third transistor, a fourth transistor are provided. In the first transistor, a first terminal is electrically connected to a first wiring; a second terminal is electrically connected to a gate terminal of the second transistor; a gate terminal is electrically connected to a fifth wiring. In the second transistor, a first terminal is electrically connected to a third wiring; a second terminal is electrically connected to a sixth wiring. In the third transistor, a first terminal is electrically connected to a second wiring; a second terminal is electrically connected to the gate terminal of the second transistor; a gate terminal is electrically connected to a fourth wiring. In the fourth transistor, a first terminal is electrically connected to the second wiring; a second terminal is electrically connected to the sixth wiring; a gate terminal is connected to the fourth wiring.