A media streaming device includes a power manager, a stream processor, and a voltage detector. The power manager receives a power signal from the media playback device to supply power to the stream processor. The stream processor provides media stream to the media playback device for playback. The voltage detector is electrically coupled to the stream processor and captures at least a part of the power supply current to the stream processor. The stream processor is configured to determine whether the power supply voltage remains stable. When the supply voltage remains stable, the stream processor operates in a first mode to provide media stream. When the power supply voltage is unstable, the stream processor operates in a second mode to provide media stream, and the power consumption of the stream processor in the second mode is lower than the power consumption in the first mode.

A chip with power-glitch detection is provided, which includes a power terminal receiving power, an inverter, and a back-up power storage device coupled to the power terminal. The inverter has an input terminal coupled to the power terminal. The back-up power storage device transforms the power to back-up power. The inverter is powered by the back-up power when a power glitch occurs on the power terminal, and the power glitch is reflected at an output terminal of the inverter.

A method for protecting data in a storage system is disclosed. In one embodiment, such a method includes detecting, by a first hardware management console, first battery-on status associated with a first uninterruptible power supply. The method further detects, by a second hardware management console, second battery-on status associated with a second uninterruptible power supply. The method communicates, from the first hardware management console to the second hardware management console, the first battery-on status. The method then triggers, by the second hardware management console, a dump of modified data from memory to more persistent storage upon detecting both the first battery-on status and the second battery-on status. A corresponding system and computer program product are also disclosed.

A method for protecting data in a storage system is disclosed. In one embodiment, such a method includes detecting, by a first hardware management console, first battery-on status associated with a first uninterruptible power supply. The method further detects, by a second hardware management console, second battery-on status associated with a second uninterruptible power supply. The method communicates, from the first hardware management console to the second hardware management console, the first battery-on status. The method then triggers, by the second hardware management console, a dump of modified data from memory to more persistent storage upon detecting both the first battery-on status and the second battery-on status. A corresponding system and computer program product are also disclosed.

An electronic device may include, for example: a first battery; at least one second battery; a power management module configured to monitor capacity information of the first battery; and a processor electrically connected to the first battery, the at least one second battery, and the power management module. The processor may be configured to: monitor whether a designated event or a low-power state in which a voltage of the first battery drops below a reference value has occurred, while the electronic device is driven using the first battery; determine that the designated event has occurred or that the first battery corresponds to the low-power state; and parallel-connect the first battery and at least one of the at least one second battery, based on determining that the designated event has occurred, or that the first battery corresponds to the low-power state. Various other embodiments are possible.

Techniques facilitating voltage droop reduction and/or mitigation in a processor core are provided. In one example, a system can comprise a memory that stores, and a processor that executes, computer executable components. The computer executable components can comprise an observation component that detects one or more events at a first stage of a processor pipeline. An event of the one or more events can be a defined event determined to increase a level of power consumed during a second stage of the processor pipeline. The computer executable components can also comprise an instruction component that applies a voltage droop mitigation countermeasure prior to the increase of the level of power consumed during the second stage of the processor pipeline and a feedback component that provides a notification to the instruction component that indicates a success or a failure of a result of the voltage droop mitigation countermeasure.

A printed circuit (PC) card apparatus can, in an absence of external power provided to a Peripheral Component Interconnect Express (PCIe) PC card, prevent and detect unauthorized access to secure data stored on a memory device mounted on the PCIe PC card. The PCIe card includes a primary battery to supply, when external power is disconnected from the PCIe card, power to an electronic security device mounted on the PCIe card. The PC card apparatus also includes a PCIe edge connector protector enclosing electrically conductive fingers of a PCIe edge card connector. The PCIe edge connector protector includes a hidden supplemental charge storage device integrated into the PCIe edge connector protector. The PCIe edge connector protector also includes electrically conductive contacts to transfer supplemental power from the supplemental charge storage device to the electronic security device.

A printed circuit (PC) card apparatus can, in an absence of external power provided to a Peripheral Component Interconnect Express (PCIe) PC card, prevent and detect unauthorized access to secure data stored on a memory device mounted on the PCIe PC card. The PCIe card includes a primary battery to supply, when external power is disconnected from the PCIe card, power to an electronic security device mounted on the PCIe card. The PC card apparatus also includes a PCIe edge connector protector enclosing electrically conductive fingers of a PCIe edge card connector. The PCIe edge connector protector includes a hidden supplemental charge storage device integrated into the PCIe edge connector protector. The PCIe edge connector protector also includes electrically conductive contacts to transfer supplemental power from the supplemental charge storage device to the electronic security device.

In some examples, a power adapter for sharing redundant power comprises a primary power input; a redundant power input; a redundant power supply identification signal (RPS ID) input; and a controller coupled to the RPS ID input. The controller is to direct power from the primary power input to an electronic device; direct power from the redundant power input to the electronic device, to another power adapter, or both; modify an RPS ID from the RPS ID input in response to directing power from the redundant power input to the electronic device; and output the modified RPS ID to the another power adapter.

In some examples, a power adapter for sharing redundant power comprises a primary power input; a redundant power input; a redundant power supply identification signal (RPS ID) input; and a controller coupled to the RPS ID input. The controller is to direct power from the primary power input to an electronic device; direct power from the redundant power input to the electronic device, to another power adapter, or both; modify an RPS ID from the RPS ID input in response to directing power from the redundant power input to the electronic device; and output the modified RPS ID to the another power adapter.