Systems and methods for dynamic repartitioning of physical memory address mapping involve relocating data stored at one or more physical memory locations of one or more memory devices to another memory device or mass storage device, repartitioning one or more corresponding physical memory maps to include new mappings between physical memory addresses and physical memory locations of the one or more memory devices, then loading the relocated data back onto the one or more memory devices at physical memory locations determined by the new physical address mapping. Such dynamic repartitioning of the physical memory address mapping does not require a processing system to be rebooted and has various applications in connection with interleaving reconfiguration and error correcting code (ECC) reconfiguration of the processing system.

A memory controller is disclosed. The memory controller is configured to control the execution of a suspend operation by a memory device. The memory controller includes: a processor configured to output an operation control signal when the memory device is performing a program/erase operation; and a suspend operation manager configured to output suspend mode change information based on the operation control signal and suspend information, wherein the processor is further configured to control the memory controller such that the memory controller outputs a suspend mode change command and a suspend command based on the suspend mode change information.

A storage controller and a storage system comprising the same are provided. Provided is a device security manager configured to set a first device security zone to allow a first tenant to access first tenant data stored in a non-volatile memory, receive access information from a host device and writing the received access information in a mapping table, wherein the access information includes a first host memory address in which the first tenant data is stored in the host device, a first namespace identifier for identifying the first tenant data stored in the non-volatile memory, a first logic block address corresponding to the first namespace identifier, and an encryption key, encrypt the first tenant data by using the encryption key, and write the encrypted first tenant data in the first device security zone of the non-volatile memory.

A memory controller according to an embodiment includes a control circuit configured to duplicate and store data received from an external host device. The control circuit is configured to, when a write request specifying first data and a first logical address is received: i) allocate a first physical address corresponding to a first bit to the first logical address, and order a first memory device to write the first data to the first physical address; and ii) allocate a first mirroring physical address corresponding to a second bit to the first physical address, and order a second memory device to write the first data to the first mirroring physical address. A number of reads the first bit is different from a number of reads for the second bit.

A system includes a memory device having multiple dice and a processing device operatively coupled to the memory device. The processing device is to perform operations, including receiving a memory operation to program a set of pages of data across at least a subset of the plurality of dice. The operations further include partitioning the set of pages into a set of partitions, programming the set of partitions to the plurality of dice, and storing, in a metadata table, at least one bit to indicate that the set of pages is partitioned.

A method is provided for use in a storage processor, the method comprising: receiving a write request, the write request including a request to store user data in an array that includes a plurality of solid-state drives (SSD); executing the write request by: identifying metadata that is associated with the write request, and writing the user data and the metadata to different data streams that are opened on the plurality of SSDs; wherein writing the user data and the metadata to different data streams causes: (i) the user data to be stored in one or more first erase units of any of the plurality of SSDs, and (ii) the metadata to be stored in one or more second erase units of any of the plurality of SSDs, such that no part of the metadata is stored on any of the one or more first erase units, and no part of the user data is stored on any of the one or more second erase units.

There is a possibility that unauthorized writing of adjustment information occurs in a sensor device in which the adjustment information of the sensor device can be written from outside. A sensor device 1 of the present embodiment includes a detection unit 2 configured to detect a physical quantity, a nonvolatile memory 5 configured to store adjustment information 6 and protection information 7, an adjustment unit 3 configured to adjust an output signal of the detection unit 2 based on contents of the adjustment information 6, an output unit 4 configured to output an output of the adjustment unit 3 to an outside via an external terminal 12, a communication unit 11 configured to communicate with the outside of the sensor device 1 via an external terminal 13, a writing unit 8 configured to perform writing process to the nonvolatile memory 6 based on information from the communication unit 11, an erasing unit 9 configured to perform erasing process of the nonvolatile memory 5 based on information from the communication unit 11, and a reading unit 10 configured to perform reading process from the nonvolatile memory 5 based on information from the communication unit 11.

A method that includes writing a plurality of codewords to a plurality of memory blocks of a memory device, where each of the plurality of codewords has a physical codeword index corresponding to a respective memory block in which each codeword is written, and assigning a virtual codeword index to each of the plurality of codewords to provide a plurality of virtual codeword indices, where assigning the virtual codeword index to each of the plurality of codewords is based, at least in part, on a location in a virtual block among a plurality of virtual blocks of memory cells corresponding to the physical codeword index of each codeword among the plurality of codewords.

A memory controller may control a memory device including a first storage area and a second storage area. The memory controller may include: a memory operation controller and a block information manager. The memory operation controller may control the memory device to perform a block merge operation of programming data stored in a victim block among normal blocks of the first storage area to a target block among the normal blocks, and perform a data migration operation of copying data stored in blocks of the first storage area to blocks of the second storage area. The block information manager may store block map information indicating whether each of the blocks of the first storage area is a normal block or a merge block. The target block may be changed from a normal block to a merge block by the block merge operation.

The present disclosure includes apparatuses and methods for performing data restore operations in memory. An embodiment includes a memory, and a controller configured to perform a data restore operation on data stored in the memory using a first table and a second table stored in the controller, wherein the first table includes a current mapping of the data stored in the memory that is based on a previous assessment of previous error rates associated with the data stored in the memory, and the second table includes a new mapping of the data stored in the memory that is based on a current assessment of current error rates associated with the data stored in the memory.