Patent classifications
G06F2213/2418
Type-Based Message Bus with Message Type Hierarches for Non-Object Oriented Applications
Techniques are provided for providing a type-based message bus with message type hierarchies for non-object oriented languages. In an example, a type-aware message bus receives a subscription message from a subscriber that identifies an object-oriented class. The message bus determines an event channel that corresponds to the class, and subscribes the subscriber to the event channel. The message bus also determines any event channels that correspond to a subclass of the class, and subscribes the subscriber to those event channels. When a publisher publishes a message to an event channel, the message bus publishes the message to each subscriber of the event channel, which can have the effect of publishing the message to subscribers that originally subscribed to superclass event channels of the event channel.
Method for providing a generic interface and microcontroller having a generic interface
A microcontroller for a control unit or a vehicle control unit, includes a central processing unit (CPU), at least one interface-unspecific input module, at least one interface-unspecific output module, at least one routing unit and at least one arithmetic unit for processing interface-specific information. The microcontroller is configurable so that the at least one interface-unspecific input module, the at least one interface-unspecific output module, the at least one routing unit and the at least one arithmetic unit for processing interface-specific information fulfill the functions corresponding to one of multiple serial interfaces, in particular of SPI, UART, LIN, CAN, PSI5, FlexRay, SENT or Ethernet. In addition, the arithmetic unit is configured to generate an entire output message frame from the second payload data as output data and to transmit the same to the interface-unspecific output module.
OS bypass inter-processor interrupt delivery mechanism
The present disclosure provides methods and systems to allow user space applications running on different cores to efficiently communicate interrupts between each other without have to enter an OS kernel. In one aspect, a hardware device for delivering inter-processor interrupts is provided. The hardware device includes a memory having a memory space that corresponds to a virtual memory space of a first guest process and a controller coupled to the memory. The controller may be configured to detect when interrupt information is recorded in the memory space. In that regard, the interrupt information is directed to a second guest process associated with a particular CPU core. In response to detecting interrupt information recorded in the memory space, the controller is configured to cause the second guest process to run on a different CPU core without making an operating system call.
MULTI-COMMAND TRANSACTIONS
Various embodiments include methods for implementing command transactions on a two-wire bus system of a computing device, and devices for implementing the methods. Embodiments may include receiving, by a two-wire interface of a host device, an abort signal via a two-wire bus, and transmitting, by the two-wire interface of the host device, an end signal via the two-wire bus in response to receiving the abort signal. Embodiments may further include transmitting, by a two-wire interface of a bus owner device, commands via the two-wire bus prior to receiving the end signal, receiving, by the two-wire interface of the bus owner device, the end signal via the two-wire bus; and terminating, by the two-wire interface of the bus owner device, transmitting commands in response to receiving the end signal. Some embodiments may include transmitting the commands following an instance of bus arbitration and prior to a subsequent instance of bus arbitration.
Multi-command transactions
Various embodiments include methods for implementing command transactions on a two-wire bus system of a computing device, and devices for implementing the methods. Embodiments may include receiving, by a two-wire interface of a host device, an abort signal via a two-wire bus, and transmitting, by the two-wire interface of the host device, an end signal via the two-wire bus in response to receiving the abort signal. Embodiments may further include transmitting, by a two-wire interface of a bus owner device, commands via the two-wire bus prior to receiving the end signal, receiving, by the two-wire interface of the bus owner device, the end signal via the two-wire bus; and terminating, by the two-wire interface of the bus owner device, transmitting commands in response to receiving the end signal. Some embodiments may include transmitting the commands following an instance of bus arbitration and prior to a subsequent instance of bus arbitration.
SENDING COMMUNICATION DATA TO NODES IN A COMMUNICATION FABRIC
Methods, systems, and computer program products for automatically sending communication data to multiple nodes within a communication fabric are provided herein. A computer-implemented method includes receiving communication data within a communication fabric; determining at least one signal type associated with at least a portion of the communication data; encoding information pertaining to the at least one determined signal type associated with the at least a portion of the communication data into one or more data representations; and transmitting the one or more data representations to multiple nodes within the communication fabric.