An adaptor device including a first interface, a second interface, a negotiation circuit and a type C manager and controller is provided. The first interface is a universal serial bus (USB) 2.0 interface, and the second interface is a type C USB interface. When the first interface receives a first mode swap request, the type C manager and controller transmits a first mode swap signal in a type C format through the second interface according to the first mode swap request; when the second interface receives a second mode swap request, the negotiation circuit transmits a second mode swap signal in a USB 2.0 format through the first interface according to the second mode swap request.

An adaptor device includes a first interface for coupling to a first processor, a second interface for coupling to a second processor, the second interface being different than the first interface, and a plurality of third interfaces, which are different than either the first interface or the second interface. The plurality of third interfaces are configured for coupling to a corresponding plurality of external devices. The adaptor device is configured to receive, at the first interface, a first signal from the first processor. In response to the first signal, the adaptor device couples through the plurality of third interfaces to the plurality of external devices to enable the first processor substantially concurrent access to the plurality of external devices. The adaptor device is also configured to receive, at the first interface, a second signal from the first processor. In response to the second signal, the adaptor device couples the second processor with a selected one of the plurality of external devices.

A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is coupled to a DP sink device through a DP connector. The USB core circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit supports only one specific conduction mode that only allows transmitting DP signals between the USB interface circuit and the DP interface circuit.

Systems and methods to implement a USB and Thunderbolt optical signal transceiver are described. One method includes detecting presence of a USB sideband signal received over an optical communication channel and associated with a USB communication request. Responsive to the detecting, the method may determine that the USB communication request corresponds to a USB communication mode and perform a sideband negotiation. The USB communication mode may be enabled. A specified number of channels associated with the USB communication request may be determined. USB communication may be performed using the specified number of channels over the optical communication channel in the USB communication mode.

In an embodiment, an apparatus includes: a first downstream port to couple to a first peer device; a second downstream port to couple to a second peer device; and a peer-to-peer (PTP) circuit to receive a memory access request from the first peer device, the memory access request having a target associated with the second peer device, where the PTP circuit is to convert the memory access request from a coherent protocol to a memory protocol and send the converted memory access request to the second peer device. Other embodiments are described and claimed.

A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is suitable for coupling to a DP connector. In a first operation mode, at least one USB signal pair received by the USB connector is transmitted to the USB core circuit through the USB interface circuit. The USB core circuit decodes the USB signal pair and generates DP data. The DP data is transmitted to the DP connector by the DP interface circuit. In a second operation mode, the DP data received by the USB connector is transmitted to the DP connector through the USB interface circuit, the switching circuit and the DP interface circuit.

An adaptor device includes a first interface for coupling to a first processor, a second interface for coupling to a second processor, the second interface being different than the first interface, and a plurality of third interfaces, which are different than either the first interface or the second interface. The plurality of third interfaces are configured for coupling to a corresponding plurality of external devices. The adaptor device is configured to receive, at the first interface, a first signal from the first processor. In response to the first signal, the adaptor device couples through the plurality of third interfaces to the plurality of external devices to enable the first processor substantially concurrent access to the plurality of external devices. The adaptor device is also configured to receive, at the first interface, a second signal from the first processor. In response to the second signal, the adaptor device couples the second processor with a selected one of the plurality of external devices.

A method and apparatus may include receiving data from a first device. The data may be received via a first protocol. The method can also include converting the data to be transmitted via a second protocol. The second protocol may be a high-speed proprietary or standard protocol. The method can also include transmitting the data via the second protocol to a second device.

A multi-port USB Power Delivery Type-C (USB-C/PD) power converter for switching clock phase shifts is described herein. The multi-port USB-C/PD power converter includes a first PD port, a second PD port, and a power controller coupled to the first and second PD ports. The power controller includes a first phased clock generator to generate a first phase-shifted clock signal by shifting a clock signal by a first phase with respect to a reference clock signal, and a second phased clock generator to generate a second phase-shifted clock signal to generate a second phased-shifted clock signal by shifting the clock signal by a second phase with respect to the reference clock signal. The first PD port and the second PD port output power in response to a first control signal based on the first phase-shifted clock signal and a second control signal based on the second phase-shifted clock signal, respectively.

An adapter device communicates with a sink device and a source device using first and second communication schemes, respectively. The adapter device includes: a transceiver receiving a state read request by detecting that a serial data line connected between the adapter device and the sink device is driven to a low level when a serial clock line connected therebetween is at a high level, and drive the serial data line to the low level and drive the serial clock line to a low level; a transmitter transmitting the state read request to the source device after the serial clock line is driven to the low level; and a receiver receiving a state read signal to read data of a state register in the sink device from the source device, wherein the transceiver transmits the state read signal to the sink device via the serial data line.