A light emitting substrate, a method of driving a light emitting substrate, and a display device are provided. The light emitting substrate includes a plurality of light emitting units arranged in an array. Each light emitting unit includes a driving circuit, a plurality of light emitting elements, and a driving voltage terminal. The plurality of light emitting elements are sequentially connected in series and connected between the driving voltage terminal and the output terminal of the driving circuit. The driving circuit is configured to output a relay signal through the output terminal in a first period according to a first input signal received by the first input terminal and a second input signal received by the second input terminal, and supply a driving signal to the plurality of light emitting elements sequentially connected in series through the output terminal in a second period.

A GOA circuit and scanning method thereof, display panel and display device are provided. The GOA circuit includes: a plurality of GOA units (1−n+2K) connected in cascades, signal output terminal of each GOA unit is connected to one row of gate lines, signal output terminal of n-th row of GOA unit is connected to signal input terminal of (n+k)-th row of GOA unit, and output terminal of the (n+k)-th row of the GOA unit is connected to signal reset terminal of the n-th row of the GOA unit and signal input terminal of of (n+2k)-th row GOA unit; the GOA circuit further comprises: gating unit (204) connected to first to k-th rows of GOA units, which controls the GOA circuit to output scanning signal from first group to k-th group of gate lines sequentially; in x-th group, the GOA circuit outputs scanning signal from x-th row to (m×k+x)-th row sequentially.

There are disclosed a gate driving circuit and a display device, which include: M areas, each area includes K sub driving circuit, and the k-th sub driving circuit includes: first and second row driving circuits, both of which include: a gate line grating control module (11) including a row control signal input terminal and an area grating signal input terminal, and an output terminal of the gate line grating control module (11) outputs a gate line grating signal according to received k-th and (k+1)-th row control signals and area grating signal; and a gate driving signal output module (12) including a gate line grating signal input terminal, a first-level driving signal input terminal and a second-level driving signal input terminal, and an output terminal of the gate driving signal output module (12) is connected to the gate line. The gate driving circuit can enhance flexibility of a scanning mode.

A display device, system having the same, and pixel are disclosed. In one aspect, the display device includes a display panel including a plurality of pixels and a plurality of wireless power receivers. The display device also includes a wireless power transmitter configured to generate and wirelessly transmit power to the wireless power receivers. Each of the wireless power receivers is configured to wirelessly receive the power from the wireless power transmitter and provide a first power supply voltage to the pixels. The display device further includes a power supply configured to generate an initial power supply voltage and provide the initial power supply voltage to the wireless power transmitter.

A display device includes a display substrate and a backplane substrate. The display substrate includes an array of micro-LEDs forming individual pixels. The backplane substrate includes a plurality of pixel logic hardware modules. Each pixel logic hardware module includes a local memory element configured to store a multi-bit pixel intensity value of a corresponding micro-LED for an image frame. The backplane substrate is bonded to a backside of the display substrate such that the pixel logic hardware modules are physically aligned behind the array of micro-LEDs and each pixel logic hardware module is electrically connected to a micro-LED of the corresponding pixel.

An object of the present invention is to, in an organic EL display device in which an initialization voltage is applied, extend the time period usable to write a video voltage as compared with the conventional art. In order to achieve this object, the organic EL display device includes a plurality of pixels each including an organic EL element; a plurality of video lines that supply a video voltage to each of the plurality of pixels; a plurality of scanning lines that supply a scanning voltage to each of the plurality of pixels; a unit that supplies a selection scanning voltage concurrently to an N number of scanning lines among the plurality of scanning lines, and supplies an initialization voltage to each of the plurality of video lines, in a k'th scanning period; and a unit that supplies a selection scanning voltage sequentially to the N number of scanning lines, and supplies video voltages to each of the plurality of video lines, in (k+1)th through (k+N)th scanning periods respectively. N is an integer of 2 or greater (2≦N) and k is any positive integer.

A selective-update display includes clusters of pixels. Each of the clusters has a cluster memory and a cluster controller and each of the pixels includes one or more light emitters. The cluster controller includes circuits operable to (i) receive a cluster packet comprising packet data, (ii) store the packet data in the cluster memory, and (iii) control the one or more light emitters in each of the pixels to emit light corresponding to the stored packet data. A display controller is connected to one or more of the clusters and is operable to transmit cluster packets to some but not all of the clusters in any order to selectively update the display. Each cluster can have a cluster address and cluster packets can include packet addresses matched to cluster addresses.

The invention discloses a gate driving circuit and a display device. The gate driving circuit includes first to eighth dock signal lines and first to N.sup.th stage first shift registers, where N is an integer greater than or equal to 9. The first to eighth clock signal lines are configured to provide first to eighth clock signals, respectively. The i.sup.th stage first shift register is coupled to one of the first to eighth clock signal lines and receives one of the first to eighth clock signals, a first input signal and a second input signal and outputs an i.sup.th stage first output signal, where i is any integer from 1 to N.

A display comprises a plurality of autonomous pixels on a substrate. Each autonomous pixel comprises a display element, a sensing element and a control element. The sensing element is arranged to detect an external stimulus and the control element is arranged to generate, entirely within the autonomous pixel, a control signal to drive the display element based, at least in part, on a magnitude of the external stimulus detected by the sensing element. Additionally, the control element comprises one or more groups of transistors, each group comprising two or more transistors arranged to perform the same function and connected in parallel with each other.

An external compensation method for devices in a panel which comprises a plurality of sub-pixels, includes programming a first device in a first sub-pixel among the plurality of sub-pixels via a first line and sensing the first device via a second line during a first period; and programming a second device in a second sub-pixel among the plurality of sub-pixels via the second line and sensing the second device via the first line or a third line during a second period.