A supplement resetting module for a gate driver circuit, including a pull-up control unit, a pull-down control unit, a clock signal input end, a predetermined level input end, a first control signal input end, a second control signal input end and a signal output end. A control end of the pull-up control unit is connected to the clock signal input end, an output end of the pull-up control unit is connected to the signal output end, a first control end of the pull-down control unit is connected to the first control signal input end, a second control end of the pull-down control unit is connected to the second control signal input end, an input end of the pull-down control unit is connected to the predetermined level input end, and an output end of the pull-down control unit is connected to the signal output end.

The present disclosure relates to a bidirectional shift register unit, a bidirectional shift register, and a display panel, wherein the bidirectional shift register unit includes: an pull-up circuit is configured to transform first clock signals into scanning signals outputting at a current level, an pull-up control circuit is configured with a forward pull-up sub-circuit and a backward pull-up sub-circuit respectively configured to pull up a potential of a control end of the pull-up circuit when a forward scanning process or a backward scanning process is conducted, a pull-down circuit and a pull-down maintaining circuit are respectively configured to pull down and continuously pull down the potential of the control end of the pull-up circuit and the scanning signals outputting at the current level during a pull-down phase. As such, a bidirectional scanning process may be achieved.

A touch sensor integrated type display device includes: a display panel including: pixels connected to data lines and gate lines and division-driven into a plurality of panel blocks, and a plurality of touch sensors connected to the pixels, a display driving circuit providing data of an input image to the pixels in multiple display periods divided from one frame period, and a touch sensing circuit driving the touch sensors and sensing a touch input in a touch sensing period allocated between the display periods of the frame period, adjacent panel blocks being division-driven in the display periods that are separated from each other with the touch sensing period, in which the touch sensors are driven, interposed therebetween, the display driving circuit including a shift register: shifting a gate pulse in accordance with a shift clock timing, and sequentially supplying the gate pulse to the gate lines.

The invention provides a gate driving circuit and a display device. The gate driving circuit is configured to drive a display panel of the display device, and includes shift registers and at least a dummy shift register. The shift registers are respectively configured to generate and output scan signals to scan lines of the display panel, the dummy shift register is configured to generate a dummy scan signal before the scan signals are generated. The dummy scan signal and the scan signals are sequentially generated.

A transistor whose channel region includes an oxide semiconductor is used as a pull down transistor. The band gap of the oxide semiconductor is 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. Thus, hot carrier degradation in the transistor can be suppressed. Accordingly, the circuit size of the semiconductor device including the pull down transistor can be made small. Further, a gate of a pull up transistor is made to be in a floating state by switching of on/off of the transistor whose channel region includes an oxide semiconductor. Note that when the oxide semiconductor is highly purified, the off-state current of the transistor can be 1 aA/?m (1?10.sup.?18 A/?m) or less. Therefore, the drive capability of the semiconductor device can be improved.

The present application discloses a shift register unit and a method for driving the same, a gate driving circuit, an array substrate, and a display apparatus. The shift register unit includes an input sub-circuit; a first output sub-circuit configured to output a first output signal to an output signal terminal, so that the output signal terminal outputs a gate driving signal having a first valid level; and a second output sub-circuit configured to output a second output signal to the output signal terminal, so that the output signal terminal outputs a gate driving signal having a second valid level, wherein an absolute value of the second valid signal is greater than an absolute value of the first valid level.

Provided are a shift register and display apparatus including the same. A shift register includes a plurality of stages, each of the plurality of stages including: a node controller configured to: periodically discharge a first node voltage generated from a first driving voltage during a first voltage level of a clock signal, and control a second node voltage opposite to the first node voltage based on a second driving voltage, and an output part configured to receive the clock signal to output an output signal based on the first node voltage.

The present disclosure provides a shift register unit, which comprises: a pull-down node control circuit, connected to a control node and a pull-down node, and configured to control a change in a potential of the pull-down node according to a potential of the control node, where the potential of the control node and the potential of the pull-down node are inversed in phase; and a first potential regulating circuit, connected to an upper-stage pull-up node and the control node, and configured to: transmit a potential of the upper-stage pull-up node to the control node when the potential of the upper-stage pull-up node is an effective operating potential; and disconnect a connection between the control node and the upper-stage pull-up node when the potential of the upper-stage pull-up node is not an effective operating potential.

A shift register includes a pull-up node, a pull-down node and a compensation sub-circuit. The pull-up node is configured to control a signal output terminal of the shift register to output a gate scanning signal, and the pull-down node is configured to stop the signal output terminal of the shift register from outputting the gate scanning signal. The compensation sub-circuit is connected to the pull-up node and/or the pull-down node, a compensation signal terminal, and a common voltage terminal. The compensation sub-circuit is configured to output a voltage from the compensation signal terminal to an output terminal of the compensation sub-circuit under the control of a signal from the pull-up node and/or a signal from the pull-down node. The output terminal of the compensation sub-circuit is connected to the common voltage terminal.

According to one aspect of this disclosure, a scanning trigger unit includes a clock signal terminal, a first signal input terminal, a fixed level signal terminal, a first input sub-circuit, an output sub-circuit, a first holding sub-circuit, and a signal output terminal. The first input sub-circuit is connected to the first signal input terminal and a control node, and is configured to provide a first valid signal to the control node; the output sub-circuit is connected to the fixed level signal terminal, the clock signal terminal, and the control node, and is configured to provide a second valid signal to the signal output terminal; and the first holding sub-circuit is connected to the fixed level signal terminal and the signal output terminal, and is configured to hold the second valid signal at the signal output terminal for a predetermined time.