A circuit having a capacitance driver circuit can allow for reduction of thermal noise to an application circuit. An output of the capacitance driver circuit can drive a capacitor for use by the application circuit coupled to the capacitor at the output of the capacitance driver circuit. The capacitance driver circuit can be structured to operate over a bandwidth of interest. With an input signal, received at the capacitance driver circuit, associated with a target voltage, an output voltage can be provided at the output of the capacitance driver circuit as a bandlimited filtered voltage value of the target voltage, where a root-mean-square voltage deviation of the output voltage from the target voltage, due to thermal noise, is less than a square root of (kT/C). The term k is Boltzmann's constant, T is Kelvin temperature of the capacitance driver circuit, and C is the capacitance of the driven capacitor.

A method and system measure a characteristic of a signal under test (SUT) using a signal measurement device. The method includes receiving and digitizing the first and second copies of the SUT through first and second input channels to obtain first and second digitized waveforms; repeatedly determining measurement values of the SUT characteristic in the first and second digitized waveforms to obtain first and second measurement values, which are paired in measurement value pairs; multiplying the first and second measurement values in each of the measurement value pairs to obtain measurement products; determining an average value of the measurement products to obtain an MSV of the measured SUT characteristic; and determine a square root of the MSV to obtain an RMS value of the measured SUT characteristic. The RMS value substantially omits variations not in the SUT, which are introduced by only one of the first and second input channels.

Coulomb counter circuitry operable in a first mode of operation and a second mode of operation, the coulomb counter circuitry comprising: first analog to digital converter (ADC) circuitry configured to generate a first ADC output signal indicative of a current through a load coupled to the coulomb counter circuitry; second analog to digital converter (ADC) circuitry; offset correction circuitry; and accumulator circuitry configured to generate a signal indicative of a cumulative amount of charge transferred to the load, wherein in the second mode of operation, the coulomb counter circuitry is operable to enable the second ADC circuitry and to generate an offset correction factor based at least in part on a second ADC output signal output by the second ADC circuitry, and wherein in subsequent operation of the coulomb counter circuitry in the first mode of operation, the offset correction circuitry applies the offset correction factor to the first ADC output signal.

An integrated circuit includes an analog-to-digital converter (ADC) configured to receive input voltage, and first and second reference voltages, and outputs digital code representing ratios between the input voltage and the first and the second reference voltages. The first and second reference voltages are generated by a reference generator using different current densities. During a first stage, the ADC samples the first input voltage and the first reference voltage and transfers equivalent charge of the sampled first input voltage and first reference voltage to an integration capacitor. During a second stage, the ADC samples the second reference voltage and transfers equivalent charge of the sampled second reference voltage to the integration capacitor. The ADC provides one bit of digital code based on total charge stored on the integration capacitor after the transfers of charge of the sampled input voltage, and the sampled first and second reference voltages.

A method for determining electric voltage u(t) and/or electric current i(t) of an RF signal in the time domain in a calibration plane, wherein by at least one directional coupler having two outputs and one signal input a first component of a first RF signal that runs from the signal input in the direction of the calibration plane, and a second component of a second RF signal that runs from the calibration plane in the direction of the signal input is decoupled. For a two-port error of the directional coupler, the error terms e.sub.00, e.sub.01, e.sub.10 and e.sub.11, are determined as a function of a frequency f and the signal values v.sub.1(t) and v.sub.2(t) are transformed into the frequency domain as wave quantities V.sub.1(f) and V.sub.2(f), and absolute wave quantities a.sub.1 and b.sub.1 in the frequency domain in the calibration plane are calculated from the wave quantities V.sub.1(f) and V.sub.2(f) by the error terms e.sub.00, e.sub.01, e.sub.10 and e.sub.11.

Apparatus and techniques for controlling measurement of an electrical parameter of an energy source can be used to obtain information for use in enhancing a power transfer efficiency between the energy source and a load. For example, during a first measurement cycle, information indicative of the electrical parameter of the energy source can be obtained using a measurement circuit during a first sampling duration in which the load is decoupled from the energy source. The information indicative of the obtained electrical parameter can be compared to a threshold. In response to the comparing, a different second sampling duration can be determined for use in obtaining information indicative of the electrical parameter during a subsequent measurement cycle. The information indicative of the electrical parameter of the energy source includes information for use in enhancing the power transfer efficiency between the energy source and the load.

A system is disclosed for optimizing mud-pulse communications in a wellbore. The system may include a mud pulser positionable in the wellbore and a surface detection system. The mud pulser can transmit a sequence of waveforms having various data rates to the surface detection system for synchronizing the mud pulser with the surface detection system. The surface detection system may receive the sequence of waveforms from the mud pulser and may determine one or more waveforms of the sequence of waveforms having amplitudes exceeding a predefined threshold. The surface detection system may then determine which of the one or more waveforms has a fastest data rate, and select the fastest data rate for use in subsequent communications with the mud pulser.

The present disclosure provides a circuitry distortion corrector for correcting distortions of electrical signals. The circuitry distortion corrector comprises a first correction filter that filters the received signals, and a second correction filter that is coupled to the first correction filter and filters the signals that are filtered by the first correction filter. The first correction filter operates based on first filter coefficients that are based on first value tuples, each first value tuple comprising a first frequency and a respective first circuitry characterizing value, and wherein the first frequencies are equally spaced apart, and the second correction filter operates with second filter coefficients that are based on second value tuples, each second value tuple comprising a second frequency and a respective second circuitry characterizing value, wherein the second frequencies are logarithmically spaced apart.

An integrated circuit (IC) is located on an IC chip and includes an integrated voltage regulator circuit that provides an internal supply voltage to the IC. A test mode signal can be received from an external pin of the IC chip. In response to the test mode signal, the IC can enter a test mode where the internal supply voltage is provided to components of the IC. Also in the test mode, voltage characteristics of the internal supply voltage are measured to produce an analog held value. The measurements occur in an analog domain and over a plurality of sample-and-hold windows. Upon completion of a measurement window, the analog held is converted to a digital value. The digital value is then stored in a memory circuit. The digital value is provided from the memory circuit to a reader device external to the IC.

A current sensing circuit for sensing a current flowing through a current sense resistor, wherein the current sense resistor is configured to receive a variable power input voltage. The current sensing circuit includes: a current sense amplifier having a first input terminal configured to be coupled to a first terminal of the current sense resistor to receive the power input voltage, a second input terminal configured to be coupled to a second terminal of the current sense resistor, and an output terminal for providing a current sensing signal indicative of the current flowing through the current sense resistor; and a calibration circuit configured to be coupled to the first input terminal of the current sense amplifier. The calibration circuit is configured to convert the power input voltage into a calibration current, and provide the calibration current to the current sense amplifier, so as to reduce a change in the current sensing signal caused by a change in the power input voltage.