A method for detecting errors or malfunctions in electrical or electronic components of circuits, wherein each of the circuits is located on a circuit board and wherein a plurality of circuit boards border one another on a circuit board panel, includes populating each of the circuit boards of the circuit board panel with electrical or electronic components corresponding to the circuits; for each of the analog, electrical or electronic components used for the construction of the circuits, placing a corresponding test component in an edge region of the circuit board panel; providing the analog, electrical or electronic test components placed in the edge region of the circuit board panel with test points; and checking for the correct function value and/or the correct poling of the analog, electrical or electronic test components provided with test points and located in the edge region of the circuit board panel.

A reference via in a set of plated vias on a printed circuit board is located. A reference lead is applied to the reference via. A test via in the set of plated vias is located. A test lead is applied to the test via. An electrical conductance between the reference via and the test via is measured. A property of a core layer of the printed circuit board is identified based on the electrical conductance.

Systems and methods for electrically testing electromigration in an electromigration test structure are disclosed herein. The systems include a voltage control portion, a current control portion, and a current regulating structure. The systems further include an electric current detector, a first system connection, and a second system connection. The systems also include a voltage detector, and a controller. In some embodiments of the methods, a voltage control portion regulates a high-side signal electric current to maintain a voltage difference below a voltage setpoint while a current control portion maintains the high-side signal electric current below a threshold current value. In some embodiments of the methods, one of the voltage difference and a magnitude of the high-side signal electric current is selected as a primary control parameter while the other is selected as a compliant control parameter.

A printed circuit board, an in-circuit test structure and a method for producing the in-circuit test structure thereof are disclosed. The in-circuit test structure comprises a via and a test pad. The via passes through the printed circuit board for communicating with an electrical device to be tested on the printed circuit board. The test pad is formed on an upper surface of the printed circuit board and covering the via, wherein a center of the via deviates from a center of the test pad. In the in-circuit test, the accuracy of the test data can be improved by means of the in-circuit test structure provided by the present invention, and thus the reliability of the test result is ensured. Also, the test efficiency of the in-circuit test is improved.

A semiconductor device includes a first test structure including a first portion of a conductive structure and a second portion of the conductive structure located within a first lateral wiring layer of a layer stack of the semiconductor device. The first portion of the conductive structure of the first test structure is electrically connected to the second portion of the conductive structure of the first test structure through a third portion located within a second lateral wiring layer of the layer stack arranged above the first lateral wiring layer. Further, the first portion of the conductive structure of the first test structure is electrically connected to a gate of a test transistor structure, a doping region of the test transistor structure or an electrode of a test capacitor. Additionally, the first portion of the conductive structure of the first test structure is electrically connected to a first test pad of the first test structure.

The present invention discloses a test structure and a method for judging the de-embedding accuracy of RF devices, which comprises testing the S parameters of a target device test structure, an introduced device test structure and an auxiliary test structure, respectively. Then calculating de-embedding S parameters of the target device test structure and the introduced device test structure according to the above-tested results, respectively. Finally, calculating performance parameters of the target device test structure according to the above-calculated de-embedding S parameters. So, the accuracy of the de-embedding method is determined by comparing the consistency of the performance parameters. The present invention can directly judge the de-embedding accuracy and the applicable frequency range of a given de-embedding method by analyzing the testing data. Further, the using of the parallel test structure and the cascade test structure together can increase the reliability of the judgment results.

Embodiments are generally directed to a buried electrical debug access port. An embodiment of an apparatus includes a substrate or printed circuit board; one or more electronic components coupled with the substrate or printed circuit board; one or more electrical access ports coupled with the substrate or printed circuit board, each electrical access port including electrically conductive material; and an encapsulant material, the encapsulant material encapsulating the one or more access ports, wherein the one or more access ports are electrically connected to one or more circuits of the apparatus to provide debugging access to the apparatus.

A dual printed circuit board assembly, a printed circuit board, and a modular printed circuit board are provided. The printed circuit board includes a plurality of first connection points. The modular printed circuit board includes a plurality of second connection points. The modular printed circuit board is adapted to be mounted on the printed circuit board and includes a sensing unit, a first detecting unit, and a first notifying unit. The sensing unit outputs a detecting voltage according to a contact state between the first connection points and the second connection points. The first detecting unit determines whether the first connection points are respectively connected to the corresponding second connection points according to the detecting voltage. When one of the first connection points is not connected to the corresponding one of the second connection points, the first detecting unit controls the first notifying unit to issue a notification.

A printed circuit board according to various embodiments of the disclosure includes a plurality of layers in which at least one opening is formed and at least one antenna included in at least one layer among the plurality of layers, and the at least one opening is located within a specified distance from the at least one antenna and is formed through at least one of the plurality of layers.

A printed circuit arrangement employs a printed circuit board having a corrosion test circuit provided with at least two conductive pads which are located proximate to each other in a measuring area. The arrangement uses a measuring device to identify corrosion on other defects in the circuit board including short circuits and/or line cuts. One pad is an excitation pad, being connected to an excitation signal source, and the other pad is a response pad, whereby the measuring device is connected at least to the response pad.