G01R31/3025

Inductive connection structure for use in an integrated circuit
10991654 · 2021-04-27 · ·

A pad forms a connection terminal suitable for coupling circuit elements integrated in a chip to circuits outside the chip itself. At least one inductor is provided for use in the reception/transmission of electromagnetic waves or for supplying the chip with power or both. The connection pad and inductor are combined in a structure which reduces overall occupied area. A magnetic containment structure surrounds the structure to contain a magnetic field of the inductor.

System and method for testing data packet signal transceivers with a tester using externally initiated and self-terminating test control sequences

System and method for testing a wireless data packet signal transceiver device under test (DUT) in which external control circuitry manages initiation of execution by a tester of test program instructions defining multiple self-terminating test control sequences in one or more desired sequences. The test control sequences may be pre-stored in a tester for subsequent execution under control of control signals sourced externally by the external control circuitry via separate control signals.

SIDE-CHANNEL SIGNATURE BASED PCB AUTHENTICATION USING JTAG ARCHITECTURE AND A CHALLENGE-RESPONSE MECHANISM
20210148977 · 2021-05-20 ·

The present disclosure describes exemplary methods and systems that are applicable for hardware authentication, counterfeit detection, and in-field tamper detection in both printed circuit board and/or integrated circuit levels by utilizing random variations in boundary-scan path delay and/or current in the industry-standard JTAG-based design-for-test structure to generate unique device identifiers.

Light emitting diode (LED) test apparatus and method of manufacture
10989755 · 2021-04-27 · ·

Embodiments relate to functional test methods useful for fabricating products containing Light Emitting Diode (LED) structures. In particular, LED arrays are functionally tested by injecting current via a displacement current coupling device using a field plate comprising of an electrode and insulator placed in close proximity to the LED array. A controlled voltage waveform is then applied to the field plate electrode to excite the LED devices in parallel for high-throughput. A camera records the individual light emission resulting from the electrical excitation to yield a function test of a plurality of LED devices. Changing the voltage conditions can excite the LEDs at differing current density levels to functionally measure external quantum efficiency and other important device functional parameters. Spectral filtering is used to improve measurement contrast and LED defect detection. External light irradiation is used to excite the LED array and improve onset of charge injection light emission and throughput.

Method and system for providing wireless FPGA programming download via a wireless communication block

A programmable semiconductor device contains a wireless communication block (WCB) capable of facilitating wirelessly field programmable gate array (FPGA) programming download as well as functional logic implementation. In one aspect, WCB detects an FPGA access request for initiating an FPGA reconfiguration from a remote system via a wireless communications network. Upon receiving a configuration bitstream for programming the FPGA via the wireless communications network, the configuration bitstream is forwarded from WCB to a configuration download block (CDB) for initiating a configuration process. CDB subsequently programs at least a portion of configurable logic blocks (LBs) in FPGA in response to the configuration bitstream.

Measurement system and method for multiple antenna measurements with different angles of arrival

A measurement system and method for over the air multiple antennas measurements are provided. The measurement system comprises, inside an anechoic chamber, a device under test, several measurement antennas, several mirrors and at least one shaped reflector. The measurement antennas are placed pointing at the shaped reflector. Each of the mirrors is placed along fields reflected by the shaped reflector. The mirrors reflect fields that form different angles of arrival at the device under test.

METHOD AND SYSTEM FOR PROVIDING WIRELESS FPGA PROGRAMMING DOWNLOAD VIA A WIRELESS COMMUNICATION BLOCK

A programmable semiconductor device contains a wireless communication block (WCB) capable of facilitating wirelessly field programmable gate array (FPGA) programming download as well as functional logic implementation. In one aspect, WCB detects an FPGA access request for initiating an FPGA reconfiguration from a remote system via a wireless communications network. Upon receiving a configuration bitstream for programming the FPGA via the wireless communications network, the configuration bitstream is forwarded from WCB to a configuration download block (CDB) for initiating a configuration process. CDB subsequently programs at least a portion of configurable logic blocks (LBs) in FPGA in response to the configuration bitstream.

SYSTEMS, DEVICES, AND METHODS FOR PERFORMING A NON-CONTACT ELECTRICAL MEASUREMENT ON A CELL, NON-CONTACT ELECTRICAL MEASUREMENT CELL VEHICLE, CHIP, WAFER, DIE, OR LOGIC BLOCK

Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.

INDUCTIVE TESTING PROBE APPARATUS FOR TESTING SEMICONDUCTOR DIE AND RELATED SYSTEMS AND METHODS

A testing probe apparatus for testing die. The testing probe may include a probe interface and a carrier for supporting at least one die comprising 3D interconnect (3DI) structures. The probe interface may be positionable on a first side of the at least one die and include a voltage source and at least one first inductor operably coupled to the voltage source. A voltage sensor and at least one second inductor coupled to the voltage sensor may be disposed on a second opposing side of the at least one die. The voltage source of the probe interface may be configured to inductively cause a voltage within the 3DI structures of the at least one die via the at least one first inductor. The voltage sensor may be configured to sense a voltage within the at least one 3DI structure via the at least one second inductor. Related systems and methods are also disclosed.

NON-CONTACT TEST SOLUTION FOR ANTENNA-ON-PACKAGE (AOP) DEVICES USING NEAR-FIELD COUPLED RF LOOPBACK PATHS
20210050652 · 2021-02-18 ·

A radio frequency (RF) loopback substrate or printed circuit board (PCB) which contains receive and transmit antennas located on the bottom of the loopback substrate which are aligned with the complementary transmit and receive antennas on an antenna on package (AOP) device under test. The loopback substrate receive and transmit antennas are coupled to each other. The device under test contacts are driven by a conventional tester, which causes RF circuitry in the integrated circuit to drive an AOP transmit antenna. The corresponding loopback substrate receive antenna receives the RF signal from the AOP transmit antenna and provides it to the loopback substrate transmit antennas. The integrated circuit package AOP receive antennas then receive the RF signals from the loopback substrate transmit antennas. The signals at the integrated circuit package AOP receive antennas are monitored through the integrated circuit contacts to monitor the received RF signals.