A signal analysis method is disclosed. The method comprises the following steps: An input signal comprising a symbol sequence is received, wherein the input signal is associated with a first clock signal comprising at least one jitter component. A second clock signal is recovered based on said input signal. At least one jitter parameter is determined that is associated with said at least one jitter component. A jitter signal is reconstructed based on said at least one jitter parameter, wherein said jitter signal is associated with said at least one jitter component. A third clock signal is determined based on said second clock signal and said jitter signal. Further, a measurement instrument is disclosed.

A method for testing a circuit includes receiving, by a noise injection circuit, an input signal and generating a noise pulse. Generating the noise pulse includes computing an input resistor pulse, and computing an output resistor pulse. Generating the noise pulse further includes short-circuiting an output resistor substantially simultaneously with opening an input resistor. The method for testing the circuit includes modifying, by the noise injection circuit, the input signal using the noise pulse.

A measurement system for automated measurement of several contributions to signal degradation is provided. Said measurement system comprises a device under test, a signal analyzer, and a controller. In this context, the controller comprises at least one command sequence for the device under test and/or the signal analyzer. In addition to this, each of the at least one command sequence comprises respective commands to compensate for a specific cause of signal degradation.

A power glitch signal detection circuit, a security chip and an electronic apparatus are disclosed. The power glitch signal detection circuit comprises: a latch and a signal output module, wherein a first input of the latch is connected to a power supply voltage, a first output of the latch is connected to a ground voltage, a second input of the latch is connected to a third output of the latch, a third input of the latch is connected to a second output of the latch, and the second output or the third output is connected to the signal output module. The power glitch signal detection circuit could detect a power glitch on the power supply voltage or the ground voltage, and the power glitch signal detection circuit has the advantages of low power consumption, small area, high speed, high sensitivity and strong portability.

An example test system includes a circuit to sample a signal that is repetitive in cycles to obtain data; a processor configured to generate an eye diagram based on the data, where the eye diagram represents parametric information about the signal; and a functional test circuit to receive the signal and to perform one or more functional tests on the signal. The test systems is configured to receive the signal from a unit under test and to allow the signal to pass to the functional test circuit inline without changing at least part of the signal.

Adjustable integrated circuits and methods for designing the same are provided. In one embodiment, a method of designing an integrated circuit includes determining a plurality of design criteria of the integrated circuit; designing a plurality of circuit blocks of the integrated circuit in accordance with the plurality of design criteria, where one or more circuit blocks in the plurality of circuit blocks include one or more feedback paths; designing a circuit performance monitor, where the circuit performance monitor includes one or more replica feedback paths corresponding to the one or more feedback paths in the one or more circuit blocks, and where the circuit performance monitor is configured to monitor feedback path information of the one or more replica feedback paths; verifying the plurality of circuit blocks and the circuit performance monitor to meet the plurality of design criteria; and producing a verified description of the integrated circuit for manufacturing.

A method determines scattering parameters, S-parameters, for a device under test for a first frequency range. The method includes receiving S-parameters for the device under test for a second frequency range, the second frequency range greater than the first frequency range. Generally, the S-parameters for the device under test for the second frequency range can be determined using known methods. The method further includes measuring an actual response of the device under test, determining a desired signal of the device under test, and determining the S-parameters for the device under test for the first frequency range based the S-parameters for the second frequency range, actual response of the device under test and the desired signal of the device under test.

A probe apparatus includes a tester including a voltage supply, and a probe card including a first probe and a first sensing pin. The first probe is electrically connected to both an output port of the voltage supply and an electrode pad of a first semiconductor device. The first sensing pin is electrically connected to both a controller and a sensing pad of the first semiconductor device.

The present invention relates to an analysis of a waveform of a signal. A waveform of the signal is divided into multiple sections and a signal integrity identifier is assigned to each section. Accordingly, a representation of the respective signal integrity identifier may be provided for each section of the waveform. The representation of the signal integrity identifier may comprise an abstract representation, for example a graphical element, an alphanumeric element, a color or even an audio signal.

Apparatuses of a noise measurement system and methods for using the same are disclosed. In one embodiment, a noise measurement system may include a plurality of probe groups electrically coupled to a plurality of DUTs, where a probe group in the plurality of probe groups includes multiple channels, and where the multiple channels of each probe group are bundled as a group for reducing electromagnetic interference among the plurality of probe groups, and wherein the group is shielded from corresponding signal groups of other DUTs with a connection to a circuit ground of the noise measurement system for reducing ground loop generated signal interference. The noise measurement system may further include a controller configured to perform noise measurement.