Methods for data quality analysis and aggregation in a building automation system and corresponding systems and computer-readable mediums. A method includes receiving input data and receiving a configuration file that defines data quality (DQ) processes to be performed on the input data. The method includes dynamically building a configurable pipeline based on the configuration file, the pipeline including one or more Data Quality Indicator (DQI) or Data Quality Aggregation (DQA) process components from a DQ core library. The method includes performing DQ processes on the input data, including executing each of the DQI or DQA process components included in the pipeline, producing one or more DQ results based on the DQ processes, and returning the one or more DQ results.

Methods for data quality analysis and aggregation in a building automation system and corresponding systems and computer-readable mediums. A method includes receiving input data and receiving a configuration file that defines data quality (DQ) processes to be performed on the input data. The method includes dynamically building a configurable pipeline based on the configuration file, the pipeline including one or more Data Quality Indicator (DQI) or Data Quality Aggregation (DQA) process components from a DQ core library. The method includes performing DQ processes on the input data, including executing each of the DQI or DQA process components included in the pipeline, producing one or more DQ results based on the DQ processes, and returning the one or more DQ results.

The disclosure is related to an electronic circuit for a field device of automation technology, comprising: a first digital processor having a first set of machine commands for executing an algorithm running in the processor, wherein the first processor is adapted to execute a test algorithm to calculate output data, wherein the test algorithm uses for calculating the output data at least a part of the first set of machine commands, which are used for executing the algorithm, a second digital processor having a second set of machine commands for executing at least one verification algorithm, wherein the second processor is adapted to execute the verification algorithm to calculate verification data, and wherein the electronic circuit including the second processor is adapted, based on the output data calculated by the first processor and the verification data calculated by the second processor, to perform a checking of the first processor.

A method and an arrangement having redundant systems operating in parallel in a cyclic mode and reciprocally checking a result of the task of the other system on a regular basis, and wherein one system is selected or confirmed for the productive mode in the fault situation found, where a characteristic variable concerning an operating parameter is picked up for each of the systems in multiple/all cycles and used for updating statistical parameters, where at least when a disparity between results of the two systems is found, a current operating parameter is correlated with the statistical parameter for each system, and where the system for which the current operating parameter differs from the statistical parameter less is detected as the correctly operating system and used for the productive mode such that the degree of fault coverage can be increased and hence the availability of the overall system increased.