The present disclosure relates to a low-dropout regulator that limits a quiescent current. It mainly includes an error amplifier, an output switching transistor, a feedback switching transistor, a current duplicating circuit, and a clamping current source. The clamping current source is added between an input voltage and the feedback switching transistor, so that a feedback current outputted by the feedback switching transistor is clamped, and the highest value is only proportional to a current value of the clamping current source. In this way, the quiescent current outputted by the low-dropout regulator is no longer increasing indefinitely in proportional to a load current, which can effectively solve the technical problems of poor stability and decreased efficiency caused by the infinite increase of the quiescent current.

An operating method of a system-on-chip (SoC) which includes a processor including a first core and a dynamic voltage and frequency scaling (DVFS) module and a clock management unit (CMU) for supplying an operating clock to the first core, the operating method including: obtaining a required performance of the first core; finding available frequencies meeting the required performance; obtaining information for calculating energy consumption for each of the available frequencies; calculating the energy consumption for each of the available frequencies, based on the information; determining a frequency, which causes minimum energy consumption, from among the available frequencies as an optimal frequency; and

adjusting an operating frequency to be supplied to the first core to the optimal frequency.

A device includes a voltage regulator circuit configured to pull up a voltage at an output terminal to equal to half of a supply voltage; multiple first transistors coupled between the output terminal and a voltage terminal providing the supply voltage; and a control circuit configured to pull down gate voltages of the first transistors from the supply voltage to a voltage level between the supply voltage and a ground voltage at a first time. The first transistors are configured to pull up the voltage at the output terminal to the supply voltage at a second time.

An aspect relates to an apparatus, including: a ring oscillator coupled between a first node and a first voltage rail; a control circuit coupled to the first node; a delay line coupled between a second node and the first voltage rail; and a voltage regulator including an input coupled to the first node and an output coupled to the second node.

A voltage regulator comprising an error amplifier, a pass transistor and a buffer circuit arranged between the error amplifier and the pass transistor. The buffer circuit comprises a load detector configured to detect a load current of the regulator by monitoring an output signal of the error amplifier. The buffer circuit further comprises a load compensator configured to receive a load signal from the load detector. The load signal indicates the load of the regulator. The load compensator is further configured to change its output impedance based on the load signal such that variations of the load of the voltage regulator are compensated. There is additionally provided a corresponding system, a corresponding method and a corresponding design structure.

Disclosed are a temperature compensation apparatus and method. The apparatus includes a reference signal generator that supplies at least one of a first current which is constant regardless of temperature variation and a second current which is proportional to temperature variation, a slope amplifier that determines a first output current having a second temperature coefficient which is a multiple of a first temperature coefficient of the second current, based on the first current and the second current, and a slope controller that determines a second output current having a third temperature coefficient, using a weighted average of the first current and the second current.

A sub-nW voltage reference is presented that provides inherently low process variation and enables trim-free operation for low-dropout regulators and other applications in nW microsystems. Sixty chips from three different wafers in 180 nm CMOS are measured, showing an untrimmed within-wafer σ/μ of 0.26% and wafer-to-wafer σ/μ of 1.9%. Measurement results also show a temperature coefficient of 48-124 ppm/° C. from −40° C. to 85° C. Outputting a 0.986V reference voltage, the reference operates down to 1.2V and consumes 114 pW at 25° C.

A method of controlling current includes receiving a current value detected by at least one regulator supplying a unit-specific voltage to each unit of an electronic device. The method also includes controlling a current flowing through the each unit on the basis of the current value.

In one embodiment, a processor includes a minimum energy point (MEP) controller to: generate a change in thermal tracking information, based at least in part on prior and current thermal information; generate a change in activity tracking information, based at least in part on prior activity information and current activity information; and determine a MEP performance state based at least in part on the change in thermal tracking information and the change in activity tracking information. Other embodiments are described and claimed.

In an example, a device includes a controller and a direct current (DC)-to-DC converter coupled to the controller and configured to provide a load current to a load. The device also includes a low-dropout (LDO) regulator coupled to the DC-to-DC converter. The controller includes digital logic, and the digital logic is configured to determine the load current. The digital logic is configured to turn on the LDO regulator if the load current is above a predetermined threshold. The digital logic is also configured to turn off the LDO regulator if the load current is below the predetermined threshold.