A low drop-out voltage regulator includes an error amplifier that generates an amplified error voltage, the error amplifier including a first input for receiving a reference voltage, a second input for receiving a feedback voltage, a bias terminal for receiving an adaptive bias current, and an output. A pass gate providing an output voltage includes a first input connected to a supply voltage and a second input connected to the error amplifier output. A feedback network generating the feedback voltage includes a first terminal connected to the output of the pass gate and a second terminal connected to the second input of the error amplifier. An adaptive bias network providing the adaptive bias current includes a first transistor connected to the bias terminal of the error amplifier, a second transistor connected to the first transistor as a current mirror, and a third transistor connected in parallel with the pass gate.

A method for controlling a circuit control system. Currents are sensed at outputs of transistors in the circuit control system. Levels are identified for the currents. A number of characteristics of the transistors are controlled while the currents flow out of the transistors such that the currents flowing out of the transistors have desired levels.

Embodiments of power source circuits and methods for operating a power source circuit are described. In one embodiment, a method for operating a power source circuit involves receiving at the power source circuit at least one digital signal from a feedback loop and increasing or decreasing an output power signal of the power source circuit in response to the at least one digital signal. Other embodiments are also described.

A circuit includes a second voltage converter electrically coupled to a comparator and first voltage converter. The first voltage converter receives first and second clocks and an input signal at a first voltage and generates an intermediate signal at a second voltage based on the input signal and the first and second clocks. The second voltage converter receives the intermediate signal, the second clock, and a comparison signal and generates an output signal at a third voltage based on the intermediate and comparison signals and the second clock. The comparator receives a reference voltage, the output signal, and the first clock, compares the reference voltage and output signal, and generates the comparison signal based on the first clock and the comparison of the reference voltage and output signal. The second voltage converter adjusts the third voltage of the output signal to approach the reference voltage based on the comparison signal.

Various embodiments of the invention provide for an adaptive headroom controller circuit that increases the efficiency of switch mode pre-regulator circuits that supply power to multiple linear sub-regulators. Certain embodiments increase efficiency by dynamically modulating the output voltage of the pre-regulator in response to varying headroom voltages requirements, which allows sub-regulators to operate at their individually optimized headroom voltage, thereby, extending battery life and, at the same time, avoiding the triggering of a drop-out condition. In certain embodiments of the invention, further efficiency improvements are provided by selectively operating low drop-out regulators in regulator and load-switch mode. The innovation is applicable to modern mobile PMIC switching pre-regulator architectures (e.g., buck, buck/boost, or boost type) powered by a single high-voltage Li-ion battery and followed by a group of low drop-out type sub-regulators that share a common, pre-regulated low voltage input that drives multiple low-voltage outputs.

A multi-deck circuit arrangement including a first deck circuit having a negative supply terminal and a second deck having a positive supply terminal connected to the negative supply terminal. A single power supply provides a voltage across both the first and second decks. The total power consumption will be less than the prior art of having both deck circuits conventionally regulated. The supply rail connecting the second deck's positive supply terminal to the first deck's negative supply terminal may be regulated. In one embodiment, the rail voltage can be controlled to optimize deck circuit operation for speed and power and to avoid level shifters when interfacing to other circuits.

In certain aspects, a system includes a voltage controller, wherein the voltage controller includes switches coupled between a voltage supply rail and an output of the voltage controller, each of the switches having a control input, and a control circuit coupled to the control inputs of the switches. The system also includes a timing circuit coupled to the control circuit, wherein the timing circuit includes a delay line, and flops, each of the flops having an input and an output, wherein the input of each of the flops is coupled to a respective node on the delay line, and the outputs of the flops are coupled to the control circuit.

The present invention relates to a power management system and a controlling method thereof. The disclosed power management system comprises a power supply device configured to provide input voltages to a load, a power state indicator device configured to store data specifying two or more power states for the load including a current state defining a current power state of the load and a load next state defining a predicted, next-in-time, power state of the load, and a power supply control device configured to independently vary the input and output voltages based on a change from the load current state to the load next state. A predictive signal is used to control the change of input voltage. The disclosed power management system is used to smooth the variation of output voltages when it is ready to change from idle/sleep power states to full power/active states or vice versa.

A data processor includes at least one power supply voltage terminal for receiving a power supply voltage and a power supply current, a data processing circuit, a register, and a port controller. The data processing circuit is coupled to the at least one power supply voltage terminal and operates using the power supply voltage. The register stores a nominal value of the power supply voltage, an electrical design current (EDC) limit, and an EDC slope, wherein the EDC slope specifies a desired voltage-current relationship for an external voltage regulator when the power supply current exceeds the EDC limit. The port controller is coupled to the register and to an output port. The data processing circuit is operative to cause the port controller to output the nominal value of the power supply voltage, the EDC limit, and the EDC slope over the output port for use by the external voltage regulator.

Provided is a user side load response method based on adjustment and control on temperature of load clusters. The user side load response method includes: performing thermodynamic modeling on a temperature control load to obtain a temperature control model in direct load control; constructing a mapping quantity to describe the change state of a temperature control load relay switch; obtaining adjustable capacity of the temperature control load through the mapping quantity; introducing temperature control load clusters to solve the problem that control precision cannot satisfy condition requirements; and finally calculating the influence of each load cluster in different load cluster control schemes on comfort degree.