A method of managing blocks in a flash memory includes: detecting states of blocks of a reserved area in the flash memory and building a bad block management table accordingly; recording mappings between bad blocks of an user area in the flash memory and good blocks of the reserved area into the bad block management table; when the bad block management table indicates there is no good block remaining in the reserved area that can be mapped to, selecting one of bad blocks of the reserved area or the user area and obtaining a recollected block after erasing the selected bad block; recording a mapping between the recollected block and a bad block in the user area into the bad block management table; and based on the bad block management table, programming data into the recollected block.

A current technique to enforce a Zoning configuration is referred to as “Hard Zoning”. Hard Zoning is a technique in which network switches in a fabric inspect packets to ascertain if a packet should be forwarded or discarded, according to the communication between nodes allowed by the Zoning configuration. For the network switches to be able to perform this packet-by-packet filtering, Zoning information needs to be supplied to the network switches. However, current approaches involve sending duplicate data to switches. These approaches are very inefficient and cumbersome. Accordingly, embodiments comprise a Centralized Discovery Controller (CDC) that collects network information, generates, for a switch, its appropriate zoning information, and sends the switch-specific zoning information to that switch.

Embodiments of the present disclosure relate to a memory system, a memory controller, and an operation method of a memory system. According to embodiments of the present disclosure, the memory system may transmit, to a host, target data, and, upon receiving, from the host, information indicating that at least one bit-flip has occurred in the target data, may perform an error handling operation on the at least one bit-flip in the target data. Accordingly, the memory system is able to reduce resource used in checking the bit-flip and to alleviate the constraints of the algorithms used in checking for the bit-flip.

A memory system includes a memory device including a plurality of memory blocks, each memory block including memory cells capable of storing multi-bit data, and a controller configured to allocate the plurality of memory blocks for plural zoned namespaces input from an external device and access a memory block allocated for one of the plural zoned namespaces which is input along with a data input/output request. In response to a first request input from the external device, the controller adjusts a number of bits of data stored in a memory cell included in a memory block, which is allocated for at least one zoned namespace among the plural zoned namespaces, and fixes a storage capacity of the at least one zoned namespace.

Embodiments of the present disclosure relate to a memory system and an operating method thereof. The memory system may include a first processor and a second processor. The first processor is configured to manage or process a main read count table including a plurality of first read count table entries each corresponding to one of a plurality of super memory blocks. The second processor is configured to manage or process, when an error occurs during an operation of reading data stored in one of the plurality of super memory blocks, a partial read count table including a read count table entry including information on a count of the read operation executed during a recovery operation for the error, and transmit an update message to the first processor for updating the main read count table based on the partial read count table.

A memory system includes a memory device including memory banks and a data bus management circuit and a host coupled to the memory device. The host includes a memory controller detecting at least one trigger initiated by at least one application for performing at least one operation on data stored within the memory device, the at least one operation including at least one of a data copy operation, and a data processing operation, and performing the at least one operation on the data within the memory device by enabling movement of the data between the data bus management circuit of the memory device and at least one memory bank of the memory banks, without exchanging the data with the host, using at least one buffer fill command and at least one buffer copy command.

Systems, methods and devices relating to a network-accessible data storage system for processing data transactions received over the network comprising one or more of a communication interface to the network, one or more data storage devices configured to respond to the data transactions communicated via the communication interface, the one or more data storage devices providing at least two data storage resources distinctly designated to accommodate respective data processing characteristics, and the data transactions are comprised of one or more of data transactions received or data transactions sent, and a resource allocation engine operatively associated with the communication interface to receive as input a given data processing characteristic automatically identifiable from each of the data transactions and allocate a designated one of the data storage resources according to the given data processing characteristic in responding to each of the data transactions.

A programmable logic controller performs execution of a program in each set period and repeats the execution of the program. The first device storage stores a device value that is an input value and an output value of the program. The second device storage stores the device value stored in the first device storage in a previous period. In a case in which a reading target preset for a device designated by a monitor request received from an engineering tool is the first device storage, the command processor reads the device value stored in the first device storage after execution of the program in a current period is completed, and in a case in which the reading target is the second device storage, the command processor immediately reads the device value stored in the second device storage. The command transmission/reception element transmits the device value to the engineering tool.

An application running in a container is able to access files stored on disk via normal file system calls, but in a manner that remains isolated from applications and processes in other containers. In one aspect, a namespace virtualization component is coupled with a copy-on-write component. When an isolated application is accessing a file stored on disk in a read-only manner, the namespace virtualization component and copy-on-write component grant access to the file. But, if the application requests to modify the file, the copy-on-write component intercepts the I/O and effectively creates a copy of the file in a different storage location on disk. The namespace virtualization component is then responsible for hiding the true location of the copy of the file, via namespace mapping.

Systems, methods and devices relating to a network-accessible data storage device comprising a network interface in data communication with a network, the network interface for receiving and sending data units, the data units being assigned to at least one of a plurality of network data queues depending on at least one data unit characteristic; a data storage component communicatively coupled with the network interface, the data storage component comprising a plurality of data storage resources for receiving and responding to data transactions communicated in data units; and a queue mapping component for mapping each network data queues to at least one data storage resource for processing of data transactions.